Youjiang Liu

Digital Predistortion for Concurrent Dual-Band Transmitters Using 2-D Modified Memory Polynomials

Cross-band modulation effects in the concurrent dual-band transmitters are quite noticeable for the linearization. This paper proposes a novel two-dimensional modified memory polynomial (2D-MMP) technique to compensate for nonlinear distortion in the concurrent dual-band transmitters. By taking into account the cross-band modulation effects, the 2D-MMP model is developed by properly modifying the envelope terms of the conventional memory polynomial (MP) model. This makes the model complexity of the 2D-MMP model significantly reduced compared to the prior 2D-DPD model in previous work. However, the linearization ability of the 2D-MMP model is still retained. Simulations prove that the 2D-MMP model is quite robust to different PA models. Experimental measurements were carried out for a dual-band class-AB PA exhibiting mild nonlinearity and a highly nonlinear dual-band Doherty PA. The results show that the 2D-MMP model can achieve nearly the same linearization accuracy compared to the 2D-DPD model, with much less coefficients. Less than -52 dBc adjacent channel power ratios (ACPRs) for the dual-band class-AB power amplifiers (PAs) and -50 dBc ACPRs for the dual-band Doherty PA in the dual bands were achieved.

A Robust Augmented Complexity-Reduced Generalized Memory Polynomial for Wideband RF Power Amplifiers

This paper proposes a robust model for the accurate behavioral modeling and digital predistortion (DPD) of wideband radio-frequency power amplifiers (PAs). It is constructed using a complexity-reduced generalized memory polynomial (MP) (GMP) (CR-GMP) connected with a nonlinear memory effect (NME) subblock in parallel. The CR-GMP is a complexity-reduced but accuracy-degraded version of the conventional GMP, and its performance is augmented by the extra NME subblock. Hence, the proposed model is termed as augmented CR-GMP (ACR-GMP). The resultant ACR-GMP model can achieve comparable performance as the GMP model, but with much fewer coefficients and lower complexity. Its performance is experimentally assessed both in forward modeling and DPD linearization. Comparisons are conducted between the ACR-GMP model and some state-of-the-art models, such as the MP, the PLUME, and the GMP. Experimental results have been given for a 1.9-GHz 35-W peak-power GaN Class-AB PA driven by two signal scenarios: a 15-MHz bandwidth long-term-evolution signal and a 20-MHz bandwidth wideband-code-division-multiple-access 1001 signal (with the middle two carriers OFF). All the results show that the ACR-GMP model outperforms both the MP and the PLUME models in terms of performances and the GMP model in terms of complexity (at comparable performances).

A Concurrent Dual-Band Uneven Doherty Power Amplifier with Frequency-Dependent Input Power Division

A concurrent dual-band uneven GaN Doherty power amplifier (PA) for two wide-spacing frequencies application is proposed in this paper. To avoid an early load modulation-drop caused by the soft turn-on characteristic of the peaking device, an adaptive power division is realized by a frequency-dependent uneven power divider as well as the input matching nonlinearities of the two cells in Doherty PA. Due to the adaptive power division, the proposed dual-band uneven Doherty PA achieves a power-added efficiency of 45% and 41% at the 6 dB backoff from the saturation at 850 MHz and 2330 MHz, respectively, the gain of the proposed Doherty PA is also enhanced to 19 dB and 13 dB in the dual bands. Furthermore, a more accurate two-dimensional joint digital predistortion model (2D-JDPD) is applied to linearize the PA and compensate for the in-phase and quadrature (I/Q) imbalance simultaneously. With this new model, the adjacent channel power ratio (ACPR) is improved to better than -47.1 dBc and -49.4 dBc in the lower and upper bands at an average output power of 31.75 dBm, and a drain efficiency of 26.7% is obtained at the same time.

Novel Technique for Wideband Digital Predistortion of Power Amplifiers With an Under-Sampling ADC

Most conventional wideband digital predistortion (DPD) techniques require the use of a very high-speed analog-to- digital converter (ADC) in the feedback path. This paper proposes a novel technique, termed under-sampling restoration digital predistortion (USR-DPD), to linearize wideband power amplifiers (PAs) with ADCs that operate at sampling rates much lower than required by Nyquist limits for the predistorted band (under-sampling ADCs). The USR processing is implemented in an iterative way to restore full-band PA output information from the under-sampled output signal, allowing memory DPD models to be successfully extracted. The USR-DPD can operate in two modes: without and with a band-limiting filter in the feedback path. In comparison with conventional DPD techniques, the requirement for ADC sampling frequency can be significantly reduced using the USR-DPD approach. Experimental tests were realized for two PAs with numerous signals (10-, 20-, 40-, and 60-MHz long-term evolution signals) using different ADC sampling frequencies. The DPD with the under-sampling ADC could achieve comparable performances to its counterpart with a full-rate ADC, while using 3-5 times lower sampling frequency, and around -50-dBc adjacent channel power ratios were achieved.

Efficient Pruning Technique of Memory Polynomial Models Suitable for PA Behavioral Modeling and Digital Predistortion

This paper proposes an error variation ranking (EVR)-based pruning method to reduce the complexity of memory polynomials (MPs) for power amplifier behavioral modeling. During the EVR pruning, the variation of prediction error caused by removing each term is calculated and ranked as a quantification factor to show the terms importance. The dominant terms are then selected based on their ranking positions among all terms. This method is verified by comparing its results with all other possible selections under the same conditions. When it is used to prune digital predistorters, approximately 74% of the terms in the MP model and 78% of the terms in the 2-D digital-predistortion model can be removed with negligible deterioration of the prediction and linearization performance. Moreover, further discussion is presented to strategize the configuration of MP models based on the EVR pruning results.

Modified Least Squares Extraction for Volterra-Series Digital Predistorter in the Presence of Feedback Measurement Errors

Measurement errors (in-phase/quadrature imbalance, dc offset, and nonlinearity) in the feedback path can adversely affect the linearization performance of digital predistorter (DPD) for RF power amplifiers (PAs). In this paper, a generalized analysis for the Volterra-series DPD system is presented in the presence of feedback measurement errors. It shows that the DPD coefficients are biased due to these errors. A modified least squares (MLS) method is then proposed for DPD coefficients extraction, which can eliminate the detrimental effect of feedback measurement errors without using a post-compensator. The proposed MLS method has the advantage of being free of behavioral modeling for the feedback path or the post-compensator. However, it can still achieve comparable performance as the state-of-the-art. The performance of the MLS method is validated with both simulations and experiments. The measurement results show that, when a nonideal feedback path is employed to capture the PA output, the proposed MLS method can still ensure a high linearization performance of the DPD, and the results are nearly the same as that when an ideal feedback path is used.

On the Robustness of Look-Up Table Digital Predistortion in the Presence of Loop Delay Error

Look-up table (LUT) predistortion is the most promising technique to linearize RF power amplifiers (PAs). Before it can be employed successfully, loop delay errors must be estimated and compensated accurately. In this paper, the effect of loop delay errors on LUT predistortion is analyzed. It is shown that LUTs fluctuations happen to both amplitude and phase tables. Then, a novel loop delay estimation algorithm, with a high degree of robustness and accuracy, is presented. To further improve the robustness of LUT predistortion to loop delay errors, the smoothing filter (SMF) method to polish LUTs fluctuations is proposed here. LUT predistortion can suffer bigger loop delay errors because of the proposed SMF method, but retains good linearization performance close to the optimal one. The performance of the proposed loop delay estimation algorithm is investigated by comparative study with a state-of-the-art algorithm. Its robustness is also demonstrated under a noisy feedback path by simulations. The effectiveness of the SMF method is assessed by both simulations and experiments. Comparison among different predistortion systems is also presented. The results clearly show that the proposed techniques are useful for LUT predistortion.

A Time Misalignment Tolerant 2D-Memory Polynomials Predistorter for Concurrent Dual-Band Power Amplifiers

This letter proposes a modified 2-D memory polynomial predistorter for concurrent dual band power amplifiers, which is tolerant to the time misalignment between the two bands. The new model is derived from the prior 2-D DPD model by substituting the interpolation expression into it. For performance validation, the proposed method is applied to a dual-band transmitter. In the presence of 4.87 samples time-misalignment existing between the two input signals, the proposed method achieves normalized mean square error of -40 dB and adjacent channel power ratio improvement of about 15 dB in the dual bands. Further experiment shows the proposed 2-D predistorter outperforms 2D-GMP in terms of complexity and signal quality.

Concurrent Dual-Band Digital Predistortion With a Single Feedback Loop

This paper proposes a compact and low-cost architecture with only a single feedback loop to implement concurrent dual-band digital predistortion (DPD) of power amplifiers (PAs). This technique is based on a new approach, down-converted carrier co-location (DC3), in conjunction with a 2-D carrier co-located memory polynomial model in PA forward modeling. The concurrent dual-band DPD models for each band can then be extracted successfully according to the forward modeling results. Experimental tests have been performed for a commercial Mini Circuits amplifier and a 120-W peak power GaN base-station PA. Different signal combinations have been tested for both balanced and unbalanced output power operations in the dual bands. The results validate that the proposed method is able to achieve linearization performances comparable to those of the conventional two parallel feedback loops based technique. Even when a nonideal feedback loop with nonflat frequency responses in the two bands is used, the new method performs well when the feedback loop is calibrated in advance. This single feedback loop based concurrent dual-band DPD architecture is a strong candidate for future broadband dual-band transmitting systems.

Digital cancellation technique to mitigate receiver desensitization in cellular handsets operating in carrier aggregation mode with multiple uplinks and multiple downlinks

Recent explosive growth in uplink and downlink carrier aggregation in cellular networks is leading to severe desense in receivers for deployment of certain band combinations. In this paper, we studied receiver desense caused by 2nd order nonlinearity of components in the signal chain. A practical case of two (bands 3 and 8) uplink aggregation and three (bands 3, 8 and 26) downlink carrier aggregation was considered to demonstrate greater than 20dB desense in band 26 receiver despite using state of the art frontend components including linear diplexer with IIP2 greater than +90dBm. We developed a digital cancellation technique that is capable of achieving greater than 20dB improvement in signal-to-interference-plus-noise ratio for 10MHz LTE signals.