Younes Boulghassoul

Models and Algorithmic Limits for an ECC-Based Approach to Hardening Sub-100-nm SRAMs

A mathematical bit error rate (BER) model for upsets in memories protected by error-correcting codes (ECCs) and scrubbing is derived. This model is compared with expected upset rates for sub-100-nm SRAM memories in space environments. Because sub-100-nm SRAM memory cells can be upset by a critical charge (Qcrit) of 1.1 fC or less, they may exhibit significantly higher upset rates than those reported in earlier technologies. Because of this, single-bit-correcting ECCs may become impractical due to memory scrubbing rate limitations. The overhead needed for protecting memories with a triple-bit-correcting ECC is examined relative to an approximate 2X ldquoprocess generationrdquo scaling penalty in area, speed, and power.

Three-dimensional mapping of single-event effects using two photon absorption

Carrier generation based on subbandgap two-photon absorption is used to perform three-dimensional mapping of the single-event transient response of the LM124 operational amplifier. Three classes of single-event-induced transients are observed for the input transistor Q20. A combination of experiment and transistor level modeling is used to assign the different classes of measured transients to charge collection across specific junctions. The large-amplitude, positive-going transients cannot be assigned to a single junction, and are identified with a collector-substrate photocurrent.

Critical Charge Characterization for Soft Error Rate Modeling in 90nm SRAM

Due to continuous technology scaling, the reduction of nodal capacitances and the lowering of power supply voltages result in an ever decreasing minimal charge capable of upsetting the logic state of memory circuits. In this paper the authors investigate the critical charge (Qcrit) required to upset a 6T SRAM cell designed in a commercial 90nm process. The authors characterize Qcrit using different current models and show that there are significant differences in Qcrit values depending on which models are used. Discrepancies in critical charge characterization are shown to result in under-predictions of the SRAMs associated soft error rate as large as two orders of magnitude. For accurate Qcrit calculation, it is critical that 3D device simulation is used to calibrate the current pulse modeling heavy ion strikes on the circuit, since the stimuli characteristics are technology feature size dependant. Current models with very fast characteristic timing parameters are shown to result in conservative soft error rate predictions; and can assertively be used to model ion strikes when 3D simulation data is not available.

Comparison of SETs in bipolar linear circuits generated with an ion microbeam, laser light, and circuit simulation

Generally good agreement is obtained between the single-event output voltage transient waveforms obtained by exposing individual circuit elements of a bipolar comparator and operational amplifier to an ion microbeam, a pulsed laser beam, and circuit simulations using SPICE. The agreement is achieved by adjusting the amounts of charge deposited by the laser or injected in the SPICE simulations. The implications for radiation hardness assurance are discussed.

The role of parasitic elements in the single-event transient response of linear circuits

Parasitic elements can play an important role in the single-event transient sensitivity of a circuit. This work describes how parasitics can affect the simulation response of linear circuits and shows how parasitics have been identified using a pulsed laser.

Comparison of single-event transients induced in an operational amplifier (LM124) by pulsed laser light and a broad beam of heavy ions

A comparison of single-event transients (SETs) from heavy-ion and pulsed-laser irradiation of the LM124 operational amplifier shows good agreement for different voltage configurations. The agreement is illustrated by comparing both individual transient shapes and plots of transient amplitude versus width.

Modeling Inter-Device Leakage in 90 nm Bulk CMOS Devices

We demonstrate an analytical modeling approach that captures the effects of total ionizing dose (TID) on the Id -Vgs characteristics of field-oxide-field-effect-transistors (FOXFETs) fabricated in a low-standby power commercial bulk CMOS technology. Radiation-enabled technology computer aided design (TCAD) simulations and experimental data allow validating the model against technological parameters such as doping concentration, field-oxide thickness, and geometry. When used in conjunction with the closed-form expressions for the surface potential, the analytical models for fixed oxide charge and interface trap density enables accurate modeling of radiation-induced degradation of the FOXFET Id -Vgs characteristics allowing the incorporation of TID into surface potential based compact models.

Critical charge and set pulse widths for combinational logic in commercial 90nm cmos technology

This work presents an efficient hybrid simulation approach, developed for accurate characterization of single-event transients (SETs) in combinational logic. Using this approach, we show that charges as small as 3.5fC can introduce transients in commercial 90nm CMOS technology, hence increasing the likelihood of SET-induced soft errors. SET pulse-widths as large as 942ps are predicted at an LET (Linear Energy Transfer) of 60MeV-cm2/mg. Process-corner variations are shown to modulate SET pulse-widths by up-to 75%. The results suggest that selection of mitigation techniques for SET radiation-hardened circuits cannot exclusively rely on baseline process analyses, as they might grossly underestimate the true SET risk to the design.

Three-Dimensional Modeling of the Two Photon Absorption Effect in a Complex Bipolar Transistor

Full three-dimensional device simulations are used to investigate charge collection in a complex bipolar transistor in the LM124 operational amplifier. The results are compared to two-photon absorption experiments and circuit simulations. The simulation results demonstrate the various circuit responses that may result from strikes on a single device. The range of responses makes it difficult to use circuit-only simulations to predict single-event effects in transistors with complex geometries.