Youngsam Shin
Samsung
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Featured researches published by Youngsam Shin.
high performance graphics | 2013
Won-Jong Lee; Youngsam Shin; Jaedon Lee; Jinwoo Kim; Jae-Ho Nah; Seok-yoon Jung; Shihwa Lee; Hyun-Sang Park; Tack-Don Han
Recently, with the increasing demand for photorealistic graphics and the rapid advances in desktop CPUs/GPUs, real-time ray tracing has attracted considerable attention. Unfortunately, ray tracing in the current mobile environment is very difficult because of inadequate computing power, memory bandwidth, and flexibility in mobile GPUs. In this paper, we present a novel mobile GPU architecture called SGRT (Samsung reconfigurable GPU based on Ray Tracing) in which a fast compact hardware accelerator and a flexible programmable shader are combined. SGRT has two key features: 1) an area-efficient parallel pipelined traversal unit; and 2) flexible and high-performance kernels for shading and ray generation. Simulation results show that SGRT is potentially a versatile graphics solution for future application processors as it provides a real-time ray tracing performance at full HD resolution that can compete with that of existing desktop GPU ray tracers. Our system is implemented on an FPGA platform, and mobile ray tracing is successfully demonstrated.
international conference on computer graphics and interactive techniques | 2012
Won-Jong Lee; Shihwa Lee; Jae-Ho Nah; Jinwoo Kim; Youngsam Shin; Jaedon Lee; Seok-yoon Jung
Recently, with the increasing demand for photorealistic graphics and the rapid advances in desktop CPUs/GPUs, real-time raytracing has attracted considerable attention. Unfortunately, raytracing in the current mobile environment is difficult because of inadequate computing power, memory bandwidth, and flexibility in mobile GPUs. In this work, we present a novel mobile GPU architecture called the SGRT (Samsung reconfigurable GPU based on RayTracing) by enhancing our previous works with the following features: 1) a fast compact hardware engine that accelerates a traversal and intersection operation, 2) a flexible reconfigurable processor that supports software ray generation and shading, and 3) a parallelization framework that achieves scalable performance. Unlike our previous work, the current architecture is designed for both static and dynamic scenes with a smaller area. Experimental results show that the SGRT can be a versatile graphics solution, as it supports compatible performance compared to desktop GPU raytracers. To the best of our knowledge, the SGRT is the first mobile GPU based on full Whitted raytracing.
international conference on computer graphics and interactive techniques | 2013
Won-Jong Lee; Youngsam Shin; Jae Don Lee; Shihwa Lee; Soojung Ryu; Jeongwook Kim
In this work, we present a novel mobile computing platfom for mobile ray tracing in which a fast compact hardware accelerator and a flexible programmable shader are combined. Our platform has two key features: 1) an area-efficient parallel pipelined traversal unit; and 2) flexible and high-performance kernels for shading and ray generation. Simulation results show that our platform is potentially a versatile graphics solution for future application processors as it provides a real-time ray tracing performance at full HD resolution that can compete with that of existing desktop GPU ray tracers. Our system is implemented on an FPGA platform, and mobile ray tracing is successfully demonstrated.
field-programmable technology | 2013
Jaedon Lee; Youngsam Shin; Won-Jong Lee; Soojung Ryu; Jeongwook Kim
Ray tracing is a 3D rendering method for generating an image by simulating the path of light. It can generate high quality images, but it requires great computing power. Recent advances in ray tracing technology enable realtime ray tracing on modern desktop CPUs/GPUs. But in the current mobile environment, it is difficult because of inadequate computing power, memory bandwidth, and flexibility in mobile GPUs. In this paper, we present a mobile ray tracing system using Samsung Reconfigurable Processor (SRP). SRP architecture includes a tightly coupled very long instruction word (VLIW) engine and coarse-grained reconfigurable array (CGRA). The VLIW engine is designed for general-purpose computations, such as function invocation and branch selection, and the coarsegrained reconfigurable array is specialized for data-intensive part of the program and can be configured dynamically. We proposed iterative batch-based ray tracing algorithm for SRP, and optimized memory bandwidth with local memory and data cache. Our ray tracing system is implemented on a commercial FPGA-based prototyping system. The experimental results show that our system is suitable for the mobile ray tracing.
international conference on computer graphics and interactive techniques | 2014
Jaedon Lee; Won-Jong Lee; Youngsam Shin; Seok Joong Hwang; Soojung Ryu; Jeongwook Kim
Ray tracing is a 3D rendering method which simulates the path of light. This technique can represent high quality visual realism, but it requires great computing power. Because of the insufficient computing power in mobile device, some hardware accelerator is required for mobile real-time ray tracing. In this work, we propose a novel hardware unit which has two-AABB (Axis Aligned Bounding Box) traversal architecture. Our architecture has two ray-AABB testing units and the efficient leaf node processing mechanism. The experimental results show that our hardware architecture has half the gate count and is up to 2.9 times faster than the existing single pipeline architecture.
high performance graphics | 2015
Won-Jong Lee; Youngsam Shin; Seok Joong Hwang; Seok Jin Kang; Jeong-Joon Yoo; Soojung Ryu
In this paper, we present an energy- and area-efficient multithreading architecture for Multiple Instruction, Multiple Data (MIMD) ray tracing hardware targeted at low-power devices. Recent ray tracing hardware has predominantly adopted an MIMD approach for efficient parallel traversal of incoherent rays, and supports a multithreading scheme to hide latency and to resolve memory divergence. However, the conventional multithreading scheme has problems such as increased memory cost for thread storage and consumption of additional energy for bypassing threads to the pipeline. Consequently, we propose a new multithreading architecture called Reorder Buffer. Reorder Buffer solves these problems by constituting a dynamic reordering of the rays in the input buffer according to the results of cache accesses. Unlike conventional schemes, Reorder Buffer is cost-effective and energy-efficient because it does not need additional thread memory nor does it consume more energy because it makes use of existing resources. Simulation results show that our architecture is a potentially versatile solution for future ray tracing hardware in low-energy devices because it provides as much as 11.7% better cache utilization and is up to 4.7 times more energy-efficient than the conventional architecture.
international conference on computer graphics and interactive techniques | 2014
Won-Jong Lee; Youngsam Shin; Jae Don Lee; Seok Joong Hwang; Soojung Ryu; Jeongwook Kim
We present an energy-efficient multithreading architecture for mobile ray tracing, which constitutes a dynamic reordering of the rays in input buffer according to the results of cache accesses. Unlike to the previous works, our architecture is cost-effective, because it does not need dedicated memory for storing threads, and is also energy-efficient, because it does not bypass the invalidated rays. Simulation results show that our architecture is a potential graphics solution for low-power ray tracing hardware as it provides a better performance-energy efficiency up to 5.5 times that of previous architectures.
international conference on consumer electronics | 2013
Won-Jong Lee; Youngsam Shin; Jaedon Lee; Jinwoo Kim; Jae-Ho Nah; Hyun-Sang Park; Seok-yoon Jung; Shihwa Lee
Recently, with the increasing demand for photorealistic graphics and the rapid advances in desktop CPUs/GPUs, real-time ray tracing has attracted considerable attention. Unfortunately, ray tracing in the current mobile environment is difficult because of inadequate computing power, memory bandwidth, and flexibility in mobile GPUs. In this paper, we present a novel mobile GPU architecture called the SGRT (Samsung reconfigurable GPU based on Ray Tracing) with the following features: 1) a fast compact hardware engine that accelerates a traversal and intersection operation, 2) a flexible reconfigurable processor that supports software ray generation and shading, and 3) a parallelization framework that achieves scalable performance. Experimental results show that the SGRT can be a versatile graphics solution, as it supports compatible performance compared to desktop GPU ray tracers.
international conference on computer graphics and interactive techniques | 2013
Youngsam Shin; Won-Jong Lee; Jaedon Lee; Shihwa Lee; Soojung Ryu; Jeongwook Kim
In this paper, we focus the impact of a memory bandwidth limitation by analyzing the bandwidth consumption for ray tracing system and present an energy efficient data transmission method between processor and ray tracing hardware engine. For evaluation of our approach, we have implemented a prototype of ray tracing architecture using our approach on FPGA platform. According to our experiment result, our approach shows a 48% reduction of system memory bandwidth on average.
international conference on computer graphics and interactive techniques | 2015
Seok Joong Hwang; Jae Don Lee; Youngsam Shin; Won-Jong Lee; Soojung Ryu
This paper presents optimization techniques devised to a hardware ray tracing engine which has been developed for mobile platforms. Whereas conventional designs deal with either fixed-point or floating-point numbers, the proposed techniques are based on hybrid number representations with fixed-point and floating-point ones. Carefully mixing the two heterogeneous number representations in computation and value encoding could improve efficiency of the ray tracing engine in terms of both energy and silicon area. Compared to a floating-point-based design, 35% and 16% area reduction was achieved in ray-box and ray-triangle intersection units, respectively. In addition, such hybrid representation could encode a bounding box in 40% smaller space at a reasonably low cost.