Yuchi Che

Air-stable conversion of separated carbon nanotube thin-film transistors from p-type to n-type using atomic layer deposition of high-κ oxide and its application in CMOS logic circuits.

Due to extraordinary electrical properties, preseparated, high purity semiconducting carbon nanotubes hold great potential for thin-film transistors (TFTs) and integrated circuit applications. One of the main challenges it still faces is the fabrication of air-stable n-type nanotube TFTs with industry-compatible techniques. Here in this paper, we report a novel and highly reliable method of converting the as-made p-type TFTs using preseparated semiconducting nanotubes into air-stable n-type transistors by adding a high-κ oxide passivation layer using atomic layer deposition (ALD). The n-type devices exhibit symmetric electrical performance compared with the p-type devices in terms of on-current, on/off ratio, and device mobility. Various factors affecting the conversion process, including ALD temperature, metal contact material, and channel length, have also been systematically studied by a series of designed experiments. A complementary metal-oxide-semiconductor (CMOS) inverter with rail-to-rail output, symmetric input/output behavior, and large noise margin has been further demonstrated. The excellent performance gives us the feasibility of cascading multiple stages of logic blocks and larger scale integration. Our approach can serve as the critical foundation for future nanotube-based thin-film macroelectronics.

Selective Synthesis and Device Applications of Semiconducting Single-Walled Carbon Nanotubes Using Isopropyl Alcohol as Feedstock

The development of guided chemical vapor deposition (CVD) growth of single-walled carbon nanotubes provides a great platform for wafer-scale integration of aligned nanotubes into circuits and functional electronic systems. However, the coexistence of metallic and semiconducting nanotubes is still a major obstacle for the development of carbon-nanotube-based nanoelectronics. To address this problem, we have developed a method to obtain predominantly semiconducting nanotubes from direct CVD growth. By using isopropyl alcohol (IPA) as the carbon feedstock, a semiconducting nanotube purity of above 90% is achieved, which is unambiguously confirmed by both electrical and micro-Raman measurements. Mass spectrometric study was performed to elucidate the underlying chemical mechanism. Furthermore, high performance thin-film transistors with an on/off ratio above 10(4) and mobility up to 116 cm(2)/(V·s) have been achieved using the IPA-synthesized nanotube networks grown on silicon substrate. The method reported in this contribution is easy to operate and the results are highly reproducible. Therefore, such semiconducting predominated single-walled carbon nanotubes could serve as an important building block for future practical and scalable carbon nanotube electronics.

Self-Aligned Fabrication of Graphene RF Transistors with T-Shaped Gate

Exceptional electronic properties of graphene make it a promising candidate as a material for next generation electronics; however, self-aligned fabrication of graphene transistors has not been fully explored. In this paper, we present a scalable method for fabrication of self-aligned graphene transistors by defining a T-shaped gate on top of graphene, followed by self-aligned source and drain formation by depositing Pd with the T-gate as a shadow mask. This transistor design provides significant advantages such as elimination of misalignment, reduction of access resistance by minimizing ungated graphene, and reduced gate charging resistance. To achieve high-yield scalable fabrication, we have combined the use of large-area graphene synthesis by chemical vapor deposition, wafer-scale transfer, and e-beam lithography to deposit T-shaped top gates. The fabricated transistors with channel lengths in the range of 110-170 nm exhibited excellent performance with peak current density of 1.3 mA/μm and peak transconductance of 0.5 mS/μm, which is one of the highest transconductance values reported. In addition, the T-gate design enabled us to achieve graphene transistors with extrinsic current-gain cutoff frequency of 23 GHz and maximum oscillation frequency of 10 GHz. These results represent important steps toward self-aligned design of graphene transistors for various applications.

Review of carbon nanotube nanoelectronics and macroelectronics

Carbon nanotubes have the potential to spur future development in electronics due to their unequalled electrical properties. In this article, we present a review on carbon nanotube-based circuits in terms of their electrical performance in two major directions: nanoelectronics and macroelectronics. In the nanoelectronics direction, we direct our discussion to the performance of aligned carbon nanotubes for digital circuits and circuits designed for radio-frequency applications. In the macroelectronics direction, we focus our attention on the performance of thin films of carbon nanotube random networks in digital circuits, display applications, and printed electronics. In the last part, we discuss the existing challenges and future directions of nanotube-based nano- and microelectronics.

Aligned carbon nanotubes: from controlled synthesis to electronic applications

Single-wall carbon nanotubes (SWNTs) possess superior geometrical, electronic, chemical, thermal, and mechanical properties and are very attractive for applications in electronic devices and circuits. To make this a reality, the nanotube orientation, density, diameter, electronic property, and even chirality should be well controlled. This Feature article focuses on recent achievements researchers have made on the controlled growth of horizontally aligned SWNTs and SWNT arrays on substrates and their electronic applications. Principles and strategies to control the morphology, structure, and properties of SWNTs are reviewed in detail. Furthermore, electrical properties of field-effect transistors fabricated on both individual SWNTs and aligned SWNT arrays are discussed. State-of-the-art electronic devices and circuits based on aligned SWNTs and SWNT arrays are also highlighted.

T-Gate Aligned Nanotube Radio Frequency Transistors and Circuits with Superior Performance

In this paper, we applied self-aligned T-gate design to aligned carbon nanotube array transistors and achieved an extrinsic current-gain cutoff frequency (ft) of 25 GHz, which is the best on-chip performance for nanotube radio frequency (RF) transistors reported to date. Meanwhile, an intrinsic current-gain cutoff frequency up to 102 GHz is obtained, comparable to the best value reported for nanotube RF transistors. Armed with the excellent extrinsic RF performance, we performed both single-tone and two-tone measurements for aligned nanotube transistors at a frequency up to 8 GHz. Furthermore, we utilized T-gate aligned nanotube transistors to construct mixing and frequency doubling analog circuits operated in gigahertz frequency regime. Our results confirm the great potential of nanotube-based circuit applications and indicate that nanotube transistors are promising building blocks in high-frequency electronics.

Self-aligned T-gate high-purity semiconducting carbon nanotube RF transistors operated in quasi-ballistic transport and quantum capacitance regime.

Carbon nanotube RF transistors are predicted to offer good performance and high linearity when operated in the ballistic transport and quantum capacitance regime; however, realization of such transistors has been very challenging. In this paper, we introduce a self-aligned fabrication method for carbon nanotube RF transistors, which incorporate a T-shaped (mushroom-shaped) aluminum gate, with oxidized aluminum as the gate dielectric. In this way, the channel length can be scaled down to 140 nm, which enables quasi-ballistic transport, and the gate dielectric is reduced to 2-3 nm aluminum oxide, leading to quasi-quantum capacitance operation. A current-gain cutoff frequency (f(t)) up to 23 GHz and a maximum oscillation frequency (f(max)) of 10 GHz are demonstrated. Furthermore, the linearity properties of nanotube transistors are characterized by using the 1 dB compression point measurement with positive power gain for the first time, to our knowledge. Our work reveals the importance and potential of separated semiconducting nanotubes for various RF applications.

Radio frequency transistors based on ultra-high purity semiconducting carbon nanotubes with superior extrinsic maximum oscillation frequency

In this paper, we report polyfluorene-separated ultra-high purity semiconducting carbon nanotube radio frequency transistors with a self-aligned T-shape gate structure. Because of the ultra-high semiconducting tube purity and self-aligned T-shape gate structure, these transistors showed an excellent direct current and radio frequency performance. In regard to the direct current characteristics, these transistors showed a transconductance up to 40 μS/μm and an excellent current saturation behavior with an output resistance greater than 200 kΩ·μm. In terms of the radio frequency characteristics, an extrinsic maximum oscillation frequency (fmax) of 19 GHz was achieved, which is a record among all kinds of carbon nanotube transistors, and an extrinsic current gain cut-off frequency (fT) of 22 GHz was achieved, which is the highest among transistors based on carbon nanotube networks. Our results take the radio frequency performance of carbon nanotube transistors to a new level and can further accelerate the application of carbon nanotubes for future radio frequency electronics.

Charge trapping in aligned single-walled carbon nanotube arrays induced by ionizing radiation exposure

The effects of near-interfacial trapping induced by ionizing radiation exposure of aligned single-walled carbon nanotube (SWCNT) arrays are investigated via measurements of gate hysteresis in the transfer characteristics of aligned SWCNT field-effect transistors. Gate hysteresis is attributed to charge injection (i.e., trapping) from the SWCNTs into radiation-induced traps in regions near the SWCNT/dielectric interface. Self-consistent calculations of surface-potential, carrier density, and trapped charge are used to describe hysteresis as a function of ionizing radiation exposure. Hysteresis width (h) and its dependence on gate sweep range are investigated analytically. The effects of non-uniform trap energy distributions on the relationship between hysteresis, gate sweep range, and total ionizing dose are demonstrated with simulations and verified experimentally.

The impact of defect scattering on the quasi-ballistic transport of nanoscale conductors

Using the Landauer approach for carrier transport, we analyze the impact of defects induced by ion irradiation on the transport properties of nanoscale conductors that operate in the quasi-ballistic regime. Degradation of conductance results from a reduction of carrier mean free path due to the introduction of defects in the conducting channel. We incorporate scattering mechanisms from radiation-induced defects into calculations of the transmission coefficient and present a technique for extracting modeling parameters from near-equilibrium transport measurements. These parameters are used to describe degradation in the transport properties of nanoscale devices using a formalism that is valid under quasi-ballistic operation. The analysis includes the effects of bandstructure and dimensionality on the impact of defect scattering and discusses transport properties of nanoscale devices from the diffusive to the ballistic limit. We compare calculations with recently published measurements of irradiated nanoscale devices such as single-walled carbon nanotubes, graphene, and deep-submicron Si metal-oxide-semiconductor field-effect transistors.