Yun-young Yeoh

Gate-All-Around (GAA) Twin Silicon Nanowire MOSFET (TSNWFET) with 15 nm Length Gate and 4 nm Radius Nanowires

GAA TSNWFET with 15 nm gate length and 4 nm radius nanowires is demonstrated and shows excellent short channel immunity. p-TSNWFET shows high driving current of 1.94 mA/mum while n-TSNWFET shows on-current of 1.44 mA/mum. Merits of TSNWFET and performance enhancement of p-TSNWFET are explored using 3D and quantum simulation

Experimental evidence of ballistic transport in cylindrical gate-all-around twin silicon nanowire metal-oxide-semiconductor field-effect transistors

We have investigated the electrical characteristics of cylindrical gate-all-around twin silicon nanowire metal-oxide-semiconductor field effect-transistors with 4nm radius and the gate length ranging from 22to408nm. We observed strong transconductance overshoot in the linear source-drain bias regime in the devices with channel length shorter than 46nm. The mean free path estimated from the slope of the zero-field one dimensional ballistic resistance measured as a function of device length was almost the same as this length.

Gate-all-around single silicon nanowire MOSFET with 7 nm width for SONOS NAND flash memory

Gate-all-around (GAA) MOSFET with single silicon nanowire is fabricated and applied to SONOS memory as a cell transistor for NAND flash string. Driving current over 1 uA, which is sufficient to NAND string, is obtained with single nanowire of ~7 nm width. Using FN tunneling conditions, VTH window of 4.5 V and fast program/erase (P/E) speed of ~10 us are obtained, respectively. The smaller nanowire width is, the faster program speed and the larger VTH shift are achieved. P/E operations in NAND string with GAA SONOS nanowire are demonstrated for the first time.

Possibility of Transport Through a Single Acceptor in a Gate-All-Around Silicon Nanowire PMOSFET

Temperature-dependent electrical transport measurements of cylindrical shaped gate-all-around silicon nanowire p-channel MOSFET were performed. At 4.2 K, they show current oscillations, which can be analyzed by single hole tunneling originated from nanowire quantum dots. In addition to this single hole tunneling, one device exhibited strong current peaks, surviving even at room temperature. The separations between these current peaks corresponded to the energy of 25 and 26 meV. These values were consistent with the sum of the bound-state energy spacing and the charging energy of a single boron atom. The radius calculated from the obtained single-atom charging energy was also comparable to the light-hole Bohr radius.

TiN/HfSiOx Gate Stack Multi-Channel Field Effect Transistor (McFET) for Sub 55nm SRAM Application

For the first time, titanium-nitride (TiN) single metal gate and high-k hafnium-silicate (HfSiO_x) gate dielectric have been successfully integrated in 55nm McFET SRAM cell. The use of HfSiO_x gate dielectric, not only reduces gate leakage current but also improves I_ON/I_OFF ratio of PFET to 10⁸. Using local fin implantation (LFI) scheme, junction capacitance is reduced by 13% and junction breakdown voltage is increased by 1.4V

Investigation of nanowire orientation and embedded Si/sub 1-x/Ge/sub x/ source/drain influence on Twin Silicon Nano-Wire Field Effect Transistor (TSNWFET)

This paper describes TSNWFET devices with embedded Si_1-xGe_x source/drain regions and different nanowire orientations. Thick Si_1-xGe_x embedded source/drain and lang110rang channel orientation is found effective to enhance p-channel TSNWFET performance, while cause degradation for n-channel one. Thin Si_1-xGe_x and lang100rang channel orientation is the preferred combination for keeping n-TSNWFET performance. With lang110rang channel orientation and thick Si_1-xGe_x in source/drain, p-MOS current, for the first time, is even observed to exceed its n-type counterpart from the experiments

Transport through single dopants in gate-all-around silicon nanowire MOSFETs (SNWFETs)

Temperature (T) dependent transport measurements of cylindrical shaped gate-all-around silicon nanowire MOSFETs (SNWFETs) were performed. Single electron tunneling behaviors were observed at 4.2 K and one of the devices exhibited anomalously strong current peak which survived even at room temperature. The observed peak was interpreted as an evidence of transport through single impurities in the channel.