Keun-Hwi Cho

Fabrication and characterization of a nanoelectromechanical switch with 15-nm-thick suspension air gap

We developed titanium nitride (TiN) based nanoelectromechanical (NEM) switch with the smallest suspension air-gap thickness ever made to date by a “top-down” complementary metal-oxide semiconductor fabrication methods. Cantilever-type NEM switch with a 15-nm-thick suspension air gap and a 35-nm-thick TiN beam was successfully fabricated and characterized. The fabricated cantilever-type NEM switch showed an essentially zero off current, an abrupt switching with less than 3mV/decade, and an on/off current ratio exceeding 105 in air ambient. Also achieved was an endurance of over several hundreds of switching cycles under dc and ac biases in air ambient.

Experimental evidence of ballistic transport in cylindrical gate-all-around twin silicon nanowire metal-oxide-semiconductor field-effect transistors

We have investigated the electrical characteristics of cylindrical gate-all-around twin silicon nanowire metal-oxide-semiconductor field effect-transistors with 4nm radius and the gate length ranging from 22to408nm. We observed strong transconductance overshoot in the linear source-drain bias regime in the devices with channel length shorter than 46nm. The mean free path estimated from the slope of the zero-field one dimensional ballistic resistance measured as a function of device length was almost the same as this length.

Subthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge

We measured and analyzed the subthreshold degradation of the gate-all-around (GAA) silicon nanowire field-effect transistors with the length of 300/500 nm and the radius of 5 nm. An analytical model incorporating the effect of interface traps quantitatively explained the measured subthreshold swing (SS) degradation. A simple electrostatic argument showed that the GAA device had smaller degradation of SS values than planar devices for the same interface trap densities.

Temperature Dependent Study of Random Telegraph Noise in Gate-All-Around PMOS Silicon Nanowire Field-Effect Transistors

We report the random telegraph noise observed in gate-all-around (GAA) PMOS silicon nanowire FETs (SNWFETs) with the radius of 5 nm, at various temperatures (s) down to 4.2 K. From the -dependence of the capture/emission time, we obtain the energy and the charging status of the trap states. The gate bias dependence and the -dependence of the scattering coefficient-mobility product extracted from the relative fluctuation amplitude of the drain current are consistent with the fact that the surface roughness scattering is dominant in GAA PMOS SNWFETs.

Preloaded freeplay wide-bandwidth low-frequency piezoelectric harvesters

We propose a technique for increasing the bandwidth of resonant low-frequency (<100u2009Hz) piezoelectric energy harvesters based on the modification of the clamped boundary condition of cantilevers, termed here as preloaded freeplay boundary condition. The effects of the preloaded freeplay boundary condition are quantified in terms of the fundamental frequency, frequency response, and power output for two beam configurations, namely, classical cantilevered bimorph piezoelectric energy harvester and zigzag unimorph piezoelectric energy harvester. A comparative analysis was performed between both the harvesters to empirically establish the advantages of the preloaded freeplay boundary condition. Using this approach, we demonstrate that the coupled degree-of-freedom dynamics results in an approximate 4–7 times increase in half-power bandwidth over the fixed boundary condition case.

Investigation of nanowire orientation and embedded Si/sub 1-x/Ge/sub x/ source/drain influence on Twin Silicon Nano-Wire Field Effect Transistor (TSNWFET)

This paper describes TSNWFET devices with embedded Si_1-xGe_x source/drain regions and different nanowire orientations. Thick Si_1-xGe_x embedded source/drain and lang110rang channel orientation is found effective to enhance p-channel TSNWFET performance, while cause degradation for n-channel one. Thin Si_1-xGe_x and lang100rang channel orientation is the preferred combination for keeping n-TSNWFET performance. With lang110rang channel orientation and thick Si_1-xGe_x in source/drain, p-MOS current, for the first time, is even observed to exceed its n-type counterpart from the experiments

Transport through single dopants in gate-all-around silicon nanowire MOSFETs (SNWFETs)

Temperature (T) dependent transport measurements of cylindrical shaped gate-all-around silicon nanowire MOSFETs (SNWFETs) were performed. Single electron tunneling behaviors were observed at 4.2 K and one of the devices exhibited anomalously strong current peak which survived even at room temperature. The observed peak was interpreted as an evidence of transport through single impurities in the channel.

Temperature dependent transport characteristics of multi-bridge-channel MOSFETs (MBCFETs)

Recently, having vertically stacked arrays of 3D channels, multi-bridge-channel MOSFETs (MBCFETs) have been fabricated successfully (Lee et al., 2003). In this paper, we report temperature dependent transport characteristics of the MBCFET.