Yuri I. Khlebnikov

100 mm 4HN-SiC Wafers with Zero Micropipe Density

Recent advances in PVT c-axis growth process have shown a path for eliminating micropipes in 4HN-SiC, leading to the demonstration of zero micropipe density 100 mm 4HN-SiC wafers. Combined techniques of KOH etching and cross-polarizer inspections were used to confirm the absence of micropipes. Crystal growth studies for 3-inch material with similar processes have demonstrated a 1c screw dislocation median density of 175 cm-2, compared to typical densities of 2x103 to 4x103 cm-2 in current production wafers. These values were obtained through optical scanning analyzer methods and verified by x-ray topography.

Growth of micropipe-free single crystal silicon carbide (SiC) ingots via physical vapor transport (PVT)

The move towards commercialization of SiC based devices places increasing demands on the quality of the substrate material. While the industry has steadily decreased the micropipe (MP) levels in commercial SiC substrates over the past years, the achievement of wafers that are entirely free of MPs marks an important milestone in commercialization of SiC based devices. We present the results of a study for controlling the nucleation and propagation of MP defects in SiC ingots grown via PVT. Our studies confirm that during bulk growth of SiC, foreign polytype nucleation such as 3C-polytype occurs at the initial stages of growth (nucleation period) and/or during subsequent growth in the presence of facets. Results in this investigation suggest that polytype instability during crystal growth adversely impacts the MP density. Based on this key concept, growth conditions for nucleation and growth stages were optimized. These conditions were subsequently implemented in an innovative PVT growth environment to achieve a growth technique with highly effective polytype control. Under continuously modulated growth conditions, MPs induced by seed material and/or formed during the growth were eliminated. 2-inch and 3-inch diameter MP-free (zero MP density) conducting 4H-SiC ingots were obtained.

SiC Epitaxial Layer Growth in a 6x150 mm Warm-Wall Planetary Reactor

Initial results are presented for SiC-epitaxial growths employing a novel 6x150-mm/10x100-mm Warm-Wall Planetary Vapor-Phase Epitaxial (VPE) Reactor. The increased areal throughput offered by this reactor and 150-mm diameter wafers, is intended to reduce the cost per unit area for SiC epitaxial layers, increasing the market penetration of already successful commercial SiC Schottky and MOSFET devices [1]. Growth rates of 20 micron/hr and short <2 hr fixed-cycle times (including rapid heat-up and cool-down ramps), while maintaining desirable epitaxial layer quality were achieved. No significant change in 150 mm diameter wafer shape is observed upon epitaxial growth consistent with good-quality, low-stress substrates and low (<5°C) cross-wafer epitaxial reactor temperature variation. Specular epitaxial layer morphology was obtained, with morphological defect densities consistent with projected 5x5 mm die yields as high as 80% and surface roughness, Ra, of 0.3 nm. Intrawafer thickness uniformity is good, averaging only 1.6% and within a run wafer-to-wafer thickness variation is 2.7%. N-type background doping densities less that 1E14 cm-3 have been measured by CV. Doping uniformity and wafer-to-wafer variation currently average ~12% requiring further improvement. The first 100 m thick 150-mm diameter epitaxial growths are reported.

Defect Status in SiC Manufacturing

Availability of high-quality, large diameter SiC wafers in quantity has bolstered the commercial application of and interest in both SiC- and nitride-based device technologies. Successful development of SiC devices requires low defect densities, which have been achieved only through significant advances in substrate and epitaxial layer quality. Cree has established viable materials technologies to attain these qualities on production wafers and further developments are imminent. Zero micropipe (ZMP) 100 mm 4HN-SiC substrates are commercially available and 1c dislocations densities were reduced to values as low as 175 cm-2. On these low defect substrates we have achieved repeatable production of thick epitaxial layers with defect densities of less than 1 cm-2 and as low as 0.2 cm-2. These accomplishments rely on precise monitoring of both material and manufacturing induced defects. Selective etch techniques and an optical surface analyzer is used to inspect these defects on our wafers. Results were verified by optical microscopy and x-ray topography.

Electrical properties of unintentionally doped semi-insulating and conducting 6H-SiC

Temperature dependent Hall effect (TDH), low temperature photoluminescence (LTPL), secondary ion mass spectrometry (SIMS), optical admittance spectroscopy (OAS), and thermally stimulated current (TSC) measurements have been made on 6H-SiC grown by the physical vapor transport technique without intentional doping. n- and p-type as well semi-insulating samples were studied to explore the compensation mechanism in semi-insulating high purity SiC. Nitrogen and boron were found from TDH and SIMS measurements to be the dominant impurities that must be compensated to produce semi-insulating properties. The electrical activation energy of the semi-insulating sample determined from the dependence of the resistivity was 1.0eV. LTPL lines near 1.00 and 1.34eV, identified with the defects designated as UD-1 and UD-3, were observed in all three samples but the intensity of the UD-1 line was almost a factor of 10 more in the n-type sample than in the the p-type sample with that in the semi-insulating sample being inter...

Dislocations as a source of micropipe development in the growth of silicon carbide

Micropipes are the primary macroscopic defects in silicon carbide single crystals. It is shown that a stable hollow core of dislocation can act as an initial site of micropipe development. The specific strain energy necessary to estimate the thermodynamic stability of a hollow dislocation core is expressed in terms of the macroscopic parameters of the material Young’s modulus and of the Gruneisen constant.Micropipes are the primary macroscopic defects in silicon carbide single crystals. It is shown that a stable hollow core of dislocation can act as an initial site of micropipe development. The specific strain energy necessary to estimate the thermodynamic stability of a hollow dislocation core is expressed in terms of the macroscopic parameters of the material Young’s modulus and of the Gruneisen constant.

A Method for Defect Delineation in Silicon Carbide Using Potassium Hydroxide Vapor

Defect evaluation of silicon carbide (SiC) wafers can be accomplished by potassium hydroxide (KOH) etching. The method described in this work employs etching by KOH in a vapor phase rather than in a liquid phase and this method allows reliable etching of both Si- and C-faces and furthermore it allows the delineation of defects on alternate orientation planes of SiC. Polished SiC wafers were etched in the temperature range from 700 to 1000°C at atmospheric air pressure. Etch pits were observed on (0001), (0001), (1120) and (1100) planes. The shape of the pits was found to be in accordance with the crystallographic symmetry. Activation energies for (0001) and (1120) planes were found to be ~17 kcal/mol and ~20 kcal/mol, respectively. It was demonstrated that the method of KOH vapor etching of SiC is simple for implementation having possibilities to reveal most of the important crystal defects.

Bulk Growth of Large Area SiC Crystals

The growth of large diameter silicon carbide (SiC) crystals produced by the physical vapor transport (PVT) method is outlined. Methods to increase the crystal diameters, and to turn these large diameter crystals into substrates that are ready for the epitaxial growth of SiC or other non homogeneous epitaxial layers are discussed. We review the present status of 150 mm and 200 mm substrate quality at Cree, Inc. in terms of crystallinity, dislocation density as well as the final substrate surface quality.

Graphitization of the Seeding Surface during the Heating Stage of SiC PVT Bulk Growth

A transient numerical simulation of the temperature field distri bu ion in a conventional resistively heated SiC PVT growth reactor revealed that the uni ntended seeding substrate sublimation typically exists during the furnace heat up stage. Conseque ntly, this would lead to the seeding surface graphitization due to nonstoichiometry of SiC evaporat ion. Suppression of the seeding surface graphitization requires significant reduction of the furnace heat up time. An optimal elevation of the argon partial pressure and seeding substrate tem p rature during the heat up stage would also promote repression of the seed graphitization. Introduction The elimination of silicon and carbon second phase inclusions (bulk defects) that may serve as new micropipe generation centers [1] is essential for high quality SiC bulk growth. While the silicon second phase formation at the growing surface of SiC was previously disc ussed and has been experimentally proven [2], the mechanisms of carbon second phase gener ation is not completely understood. One of the possible mechanisms being proposed here may result f rom unintended seeding substrate sublimation (thermal etching), which typically exists during the heating stage of SiC PVT bulk growth. Model description Transient numerical simulation of the temperature field distributi on during the initial (furnace heat up) stage and steady state phase of growth run i n a conventional resistively heated PVT reactor was performed using GAMBIT-1.3.1/FIDAP-8.6 software pa ckage. The numerical model incorporated the axi-symmetric geometry of the calculati on domain, time dependence of the heating power rise at the growth beginning and the temperature de pendent physical properties of the seeding substrate, SiC source material, argon/Si xCy vapor mixture and the materials used in the furnace design. Conduction in the solid elements of the calculation domai n and radiation along with conduction in the fluid (gaseous) regions represent the heat transfer mechanisms incorporated in the model, whereas the convective component of heat transfer was omitted [3, 4]. Results and Discussion According to the simulation results, the heating up rate of the sourc e material region significantly differs from that of the seeding substrate (see Fig. 1). Such a situation is primarily attributed to the large difference in the thermal conductivities of SiC source material λP and the seeding substrate λC (λC/λP>100 at 2500 K) [5, 6]. This difference determines the typical temperature rise dynamics of the source material and the grow in crystal shown in Fig. 2. As is clear from the plot, the furnace heat up stage continues ~3 hr afte r the heating power switch on. At the beginning of this stage 0 < t < tB the major part of the source material region is not heated up yet. In fact, the temperature inside the source material volume (point 3 in Fig.1) is significantly Materials Science Forum Online: 2003-09-15 ISSN: 1662-9752, Vols. 433-436, pp 99-102 doi:10.4028/www.scientific.net/MSF.433-436.99

SiC Epitaxial Growth on Multiple 100-mm Wafers and its Application to Power-Switching Devices

The development of SiC bulk and epitaxial materials is reviewed with an emphasis on epitaxial growth using high-throughput, multi-wafer, vapor phase epitaxial (VPE) warm-wall planetary reactors. It will be shown how the recent emergence of low-cost high-quality 100-mm diameter epitaxial SiC wafers is enabling the economical production of advanced wide-bandgap Power–Switching devices.