Zhijiong Luo

High-temperature characteristics of high-quality SiC MIS capacitors with O/N/O gate dielectric

This paper reports the high temperature (up to 450/spl deg/C) characteristics of 6H-SiC MIS capacitors made with SiO/sub 2//SiN/SiO/sub 2/ (ONO) stack gate dielectric deposited by the jet vapor deposition (JVD) process. This ONO stack gate dielectric provides: (1) high immunity to instability caused by mobile ions, (2) orders of magnitude lower gate leakage current than its thermal oxide counterpart, (3) the highest dielectric breakdown strength ever reported for SiC MIS structures at elevated temperatures (i.e., greater than 12 MV/cm at 450/spl deg/C), (4) relatively symmetric p-and n-type C-V and current-voltage (I-V) characteristics, due to low densities of dielectric charge as well as interface traps in both types of samples, and (5) over ten years of projected lifetime for both types operating at an electric field of 3 MV/cm at 350/spl deg/C. The key factors contributing to such success are briefly discussed.

A new method to extract EOT of ultrathin gate dielectric with high leakage current

The standard capacitance-voltage (C-V ) technique can no longer determine accurately the equivalent oxide thickness (EOT) for an advanced CMOS transistor with ultrathin gate dielectric where there is high gate leakage current, as well as series resistance; this situation will get worse as the CMOS transistors scaling trend continues. This paper describes a simple methodology based on dual-frequency C-V measurement and four-element circuit model to extract accurately the EOT in the presence of gate leakage current and series resistance. This method can be effective with a current density of 1000 A/cm/sup 2/ for a 10 /spl mu/m /spl times/10 /spl mu/m capacitor. Such a high current density will satisfy the projected gate leakage current requirements for many generations of CMOS technologies, as specified in the 2003 International Technology Roadmap for Semiconductors.

Temperature dependence of gate currents in thin Ta2O5 and TiO2 films

This letter reports our study of the temperature dependence of gate currents in thin Ta2O5 and TiO2 films. The study was conducted (1) to study the conduction mechanisms and band alignments, and (2) to determine whether the gate leakage current is tolerable at high temperatures for either of these high-dielectric-constant (high-k) oxides. The I–V characteristics of these oxides were measured and analyzed over a wide temperature range from 25 to 400 °C. Currents in Ta2O5 samples exhibited stronger temperature dependence than those in TiO2 samples, especially at high fields, mainly due to a much smaller electron barrier height of Ta2O5 over Si (0.28 eV) than that of TiO2 over Si (0.9 eV).

JVD silicon nitride as tunnel dielectric in p-channel flash memory

High-quality jet vapor deposition nitride is investigated as a tunnel dielectric for flash memory device application. Compared to control devices with SiO/sub 2/ tunnel dielectric, faster programming speed as well as better retention time are achieved with low programming voltage. The p-channel devices can be programmed by hot electrons and erased by hot holes, or vice versa. Multilevel programming capability is shown.

Two silicon nitride technologies for post-SiO 2 MOSFET gate dielectric

P-MOSFETs with 14 /spl Aring/ equivalent oxide thickness (EOT) were fabricated using both JVD Si/sub 3/N/sub 4/ and RTCVD Si/sub 3/N/sub 4//SiO/sub x/N/sub y/ gate dielectric technologies. With gate length down to 80 nm, the two technologies produced very similar device performances, such as drive current and gate tunneling current. The low gate leakage current, good device characteristics and compatibility with conventional CMOS processing technology make both nitride gate dielectrics attractive candidates for post-SiO/sub 2/ scaling. The fact that two significantly different technologies produced identical results suggests that the process window should be quite large.

Optical Properties of Jet‐Vapor‐Deposited TiAlO and HfAlO Determined by Vacuum Utraviolet Spectroscopic Ellipsometry

In this report we use vacuum ultraviolet spectroscopic ellipsometry (VUV‐SE) to determine the optical as well as structural properties of high‐k metal oxides, in particular, of hafnium aluminates and titanium aluminates grown by jet‐vapor deposition. In our opinion, the adapted approach employed in this study can be applied in most other high‐k dielectric thin films which are of great interest in developing a new material replacement for the SiO2 gate dielectric in CMOS and other IC devices. Specifically, VUV spectroscopic ellipsometry measurements were performed on a commercial ellipsometer with spectral range from 1.0 eV (1240 nm) to 8.7 eV (143 nm). The Generalized Tauc‐Lorentz (GTL) dispersion was used to determine the dielectric functions of these films. An ellipsometric model consisting of two layers of different film densities was found to be in excellent agreement with the experimental data. For the TiAlO films, only one film was needed in the model to fit the data. The optical bandgaps are seen t...

Low-voltage, fast-programming P-channel flash memory with JVD tunneling nitride

High-quality JVD nitride is applied to a P-channel flash memory as the tunneling dielectric for the first time. Compared to control devices with SiO/sub 2/ tunneling dielectric, much faster programming speed can be achieved with low programming voltage as well as better retention time. Multilevel capability is also demonstrated. This device can be programmed by hot electrons and erased by hot holes, or vice versa.

Microstructure and Electronic Properties of Thin Film Nanoporous Silica as a Function of Processing and Annealing Methods

Alcogels, aerogel precursors, were prepared by hydrolysis and condensation of the metal alkoxide tetraethylorthosilicate and were catalyzed by both acids and bases, according to a standard reaction. Alcogel solution was spin coated onto p-type silicon wafers and fluid extraction was achieved in an uncontrolled (room temperature, atmospheric pressure) environment. Film porosity was retained through surface modification and/or low vapor pressure solvent techniques. The microstructure and electronic properties of the resulting films were evaluated using non-contact atomic force microscopy (nc-AFM), cross sectional scanning electron microscopy (SEM), and transmission electron microscopy (TEM). Metal insulator semiconductor (MIS) devices were prepared and current-voltage and capacitance-voltage measurements were obtained from these devices. Annealing studies reveal a dramatic temperature dependent effect on both the microstructure and electronic properties of the porous silica films.