Adam T. Neal
Purdue University
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Featured researches published by Adam T. Neal.
ACS Nano | 2014
Han Liu; Adam T. Neal; Zhen Zhu; Zhe Luo; Xianfan Xu; David Tománek; Peide D. Ye
We introduce the 2D counterpart of layered black phosphorus, which we call phosphorene, as an unexplored p-type semiconducting material. Same as graphene and MoS2, single-layer phosphorene is flexible and can be mechanically exfoliated. We find phosphorene to be stable and, unlike graphene, to have an inherent, direct, and appreciable band gap. Our ab initio calculations indicate that the band gap is direct, depends on the number of layers and the in-layer strain, and is significantly larger than the bulk value of 0.31-0.36 eV. The observed photoluminescence peak of single-layer phosphorene in the visible optical range confirms that the band gap is larger than that of the bulk system. Our transport studies indicate a hole mobility that reflects the structural anisotropy of phosphorene and complements n-type MoS2. At room temperature, our few-layer phosphorene field-effect transistors with 1.0 μm channel length display a high on-current of 194 mA/mm, a high hole field-effect mobility of 286 cm(2)/V·s, and an on/off ratio of up to 10(4). We demonstrate the possibility of phosphorene integration by constructing a 2D CMOS inverter consisting of phosphorene PMOS and MoS2 NMOS transistors.Preceding the current interest in layered materials for electronic applications, research in the 1960s found that black phosphorus combines high carrier mobility with a fundamental band gap. We introduce its counterpart, dubbed few-layer phosphorene, as a new 2D p-type material. Same as graphene and MoS2, phosphorene is flexible and can be mechanically exfoliated. We find phosphorene to be stable and, unlike graphene, to have an inherent, direct and appreciable band-gap that depends on the number of layers. Our transport studies indicate a carrier mobility that reflects its structural anisotropy and is superior to MoS2. At room temperature, our phosphorene field-effect transistors with 1.0 um channel length display a high on-current of 194 mA/mm, a high hole field-effect mobility of 286 cm2/Vs, and an on/off ratio up to 1E4. We demonstrate the possibility of phosphorene integration by constructing the first 2D CMOS inverter of phosphorene PMOS and MoS2 NMOS transistors.
ACS Nano | 2012
Han Liu; Adam T. Neal; Peide D. Ye
In this article, we investigate electrical transport properties in ultrathin body (UTB) MoS(2) two-dimensional (2D) crystals with channel lengths ranging from 2 μm down to 50 nm. We compare the short channel behavior of sets of MOSFETs with various channel thickness, and reveal the superior immunity to short channel effects of MoS(2) transistors. We observe no obvious short channel effects on the device with 100 nm channel length (L(ch)) fabricated on a 5 nm thick MoS(2) 2D crystal even when using 300 nm thick SiO(2) as gate dielectric, and has a current on/off ratio up to ~10(9). We also observe the on-current saturation at short channel devices with continuous scaling due to the carrier velocity saturation. Also, we reveal the performance limit of short channel MoS(2) transistors is dominated by the large contact resistance from the Schottky barrier between Ni and MoS(2) interface, where a fully transparent contact is needed to achieve a high-performance short channel device.
ACS Nano | 2014
Han Liu; Mengwei Si; Yexin Deng; Adam T. Neal; Yuchen Du; Sina Najmaei; Pulickel M. Ajayan; Jun Lou; Peide D. Ye
In this article, we study the properties of metal contacts to single-layer molybdenum disulfide (MoS2) crystals, revealing the nature of switching mechanism in MoS2 transistors. On investigating transistor behavior as contact length changes, we find that the contact resistivity for metal/MoS2 junctions is defined by contact area instead of contact width. The minimum gate dependent transfer length is ∼0.63 μm in the on-state for metal (Ti) contacted single-layer MoS2. These results reveal that MoS2 transistors are Schottky barrier transistors, where the on/off states are switched by the tuning of the Schottky barriers at contacts. The effective barrier heights for source and drain barriers are primarily controlled by gate and drain biases, respectively. We discuss the drain induced barrier narrowing effect for short channel devices, which may reduce the influence of large contact resistance for MoS2 Schottky barrier transistors at the channel length scaling limit.
IEEE Electron Device Letters | 2013
Yuchen Du; Han Liu; Adam T. Neal; Mengwei Si; Peide D. Ye
For the first time, polyethyleneimine (PEI) doping on multilayer MoS2 field-effect transistors is investigated. A 2.6 times reduction in sheet resistance and 1.2 times reduction in contact resistance have been achieved. The enhanced electrical characteristics are also reflected in a 70% improvement in ON-current and 50% improvement in extrinsic field-effect mobility. The threshold voltage confirms a negative shift upon the molecular doping. All studies demonstrate the feasibility of PEI molecular doping in MoS2 transistors and its potential applications in layer-structured semiconducting 2-D crystals.
Nano Letters | 2013
Han Liu; Mengwei Si; Sina Najmaei; Adam T. Neal; Yuchen Du; Pulickel M. Ajayan; Jun Lou; Peide D. Ye
Monolayer molybdenum disulfide (MoS2) with a direct band gap of 1.8 eV is a promising two-dimensional material with a potential to surpass graphene in next generation nanoelectronic applications. In this Letter, we synthesize monolayer MoS2 on Si/SiO2 substrate via chemical vapor deposition (CVD) method and comprehensively study the device performance based on dual-gated MoS2 field-effect transistors. Over 100 devices are studied to obtain a statistical description of device performance in CVD MoS2. We examine and scale down the channel length of the transistors to 100 nm and achieve record high drain current of 62.5 mA/mm in CVD monolayer MoS2 film ever reported. We further extract the intrinsic contact resistance of low work function metal Ti on monolayer CVD MoS2 with an expectation value of 175 Ω·mm, which can be significantly decreased to 10 Ω·mm by appropriate gating. Finally, field-effect mobilities (μFE) of the carriers at various channel lengths are obtained. By taking the impact of contact resistance into account, an average and maximum intrinsic μFE is estimated to be 13.0 and 21.6 cm(2)/(V s) in monolayer CVD MoS2 films, respectively.
IEEE Electron Device Letters | 2014
Han Liu; Adam T. Neal; Mengwei Si; Yuchen Du; Peide D. Ye
Phosphorene is a unique single elemental semiconductor with two-dimensional layered structures. In this letter, we study the transistor behavior on mechanically exfoliated few-layer phosphorene with the top-gate. We achieve a high ON-current of 144 mA/mm and hole mobility of 95.6 cm2/V·s. We deposit Al2O3 by atomic layer deposition (ALD) and study the effects of dielectric capping. We observe that the polarity of the transistors alternated from p-type to ambipolar with Al2O3 grown on the top. We attribute this transition to the changes for the effective Schottky barrier heights for both electrons and holes at the metal contact edges, which is originated from fixed charges in the ALD dielectric.
Applied Physics Letters | 2011
J. J. Gu; Adam T. Neal; Peide D. Ye
Planar and 3-dimensional (3D) buried-channel InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs) have been experimentally demonstrated at deep-submicron gate lengths. The effect of (NH4)2 S passivation with different concentrations (20%, 10%, or 5%) on the off-state performance of these devices has been systematically studied. 10% (NH4)2 S treatment is found to yield the optimized high-k/InP barrier layer interface property, resulting in a minimum subthreshold swing (SS) lower than 100 mV/dec. Moreover, the 3D device structure greatly improves the off-state performance and facilitates enhancement-mode operation. A scaling metrics study has been carried out for 10% (NH4)2 S treated 3D devices with gate lengths down to 100 nm. With the optimized interface passivation, 3D III-V MOSFETs are very promising for future high-speed low-power logic applications.
ACS Nano | 2013
Adam T. Neal; Han Liu; Jiangjiang Gu; Peide D. Ye
We have characterized phase coherence length, spin-orbit scattering length, and the Hall factor in n-type MoS2 2D crystals via weak localization measurements and Hall-effect measurements. Weak localization measurements reveal a phase coherence length of ~50 nm at T = 400 mK for a few-layer MoS2 film, decreasing as T(-1/2) with increased temperatures. Weak localization measurements also allow us, for the first time without optical techniques, to estimate the spin-orbit scattering length to be 430 nm, pointing to the potential of MoS2 for spintronics applications. Via Hall-effect measurements, we observe a low-temperature Hall mobility of 311 cm(2)/(V s) at T = 1 K, which decreases as a power law with a characteristic exponent γ = 1.5 from 10 to 60 K. At room temperature, we observe Hall mobility of 24 cm(2)/(V s). By determining the Hall factor for MoS2 to be 1.35 at T = 1 K and 2.4 at room temperature, we observe drift mobility of 420 and 56 cm(2)/(V s) at T = 1 K and room temperature, respectively.
arXiv: Mesoscale and Nanoscale Physics | 2012
J. J. Gu; Heng Wu; Yiqun Liu; Adam T. Neal; Roy G. Gordon; Peide D. Ye
InGaAs gate-all-around nanowire MOSFETs with channel length down to 50 nm have been experimentally demonstrated by a top-down approach. The nanowire size-dependent transport properties have been systematically investigated. It is found that reducing nanowire dimension leads to higher on-current, transconductance, and effective mobility due to stronger quantum confinement and the volume-inversion effect. TCAD quantum mechanical simulation has been carried out to study the inversion charge distribution inside the nanowires. Volume-inversion effect appears at a larger dimension for InGaAs nanowire MOSFET than its Si counterpart.
IEEE Electron Device Letters | 2012
J. J. Gu; Heng Wu; Yiqun Liu; Adam T. Neal; Roy G. Gordon; Peide D. Ye
InGaAs gate-all-around nanowire MOSFETs with channel length down to 50 nm have been experimentally demonstrated by a top-down approach. The nanowire size-dependent transport properties have been systematically investigated. It is found that reducing nanowire dimension leads to higher on-current, transconductance, and effective mobility due to stronger quantum confinement and the volume-inversion effect. TCAD quantum mechanical simulation has been carried out to study the inversion charge distribution inside the nanowires. Volume-inversion effect appears at a larger dimension for InGaAs nanowire MOSFET than its Si counterpart.