Adoración Rueda

Nonlinear switched capacitor 'neural' networks for optimization problems

A systematic approach is presented for the design of analog neural nonlinear programming solvers using switched-capacitor (SC) integrated circuit techniques. The method is based on formulating a dynamic gradient system whose state evolves in time toward the solution point of the corresponding programming problem. A neuron cell for the linear and the quadratic problem suitable for monolithic implementation is introduced. The design of this neuron and its corresponding synapses using SC techniques is considered in detail. An SC circuit architecture based on a reduced set of basic building blocks with high modularity is presented. Simulation results using a mixed-mode simulator (DIANA) and experimental results from breadboard prototypes are included, illustrating the validity of the proposed techniques. >

A tissue impedance measurement chip for myocardial ischemia detection

In this paper, the design of a specific integrated circuit for the measurement of tissue impedances is presented. The circuit will be part of a multi-micro-sensor system intended to be used in cardiac surgery for sensing biomedical parameters in living bodies. Myocardium tissue impedance is one of these parameters which allows ischemia detection. The designed chip will be used in a four-electrode based setup where the effect of electrode interfaces are cancelled by design. The chip includes a circuit to generate the stimulus signals (sinusoidal current) and the circuitry to measure the magnitude and phase of the tissue impedance. Several integrated circuits have been designed, fabricated and tested, in a 0.8-/spl mu/m CMOS process, working at 3 V of power supply. Some of them including building blocks, and other with the whole measurement system. Experimental tests have shown the circuit feasibility giving expected results for both in-vitro and in-vivo test conditions.

Practical oscillation-based test of integrated filters

Oscillation-based test (OBT) techniques show promise in detecting faults in mixed-signal circuits and require little modification. to the circuit under test. Comparing both the oscillations amplitude and frequency yields acceptable test quality. OBT seems especially appealing for filters but requires adaptation to handle monolithic circuits or the analog-core-based design of complex mixed-signal ICs.

Effective oscillation-based test for application to a DTMF filter bank

This paper deals with a case study applying oscillation-based testing to an industrial circuit. The aim of the presentation is to discuss a practical way of carrying out an effective implementation of the oscillation test technique as well as discussing guidelines for its application.

Chaos from switched-capacitor circuits: Discrete maps

A special-purpose analog computer made of switched-capacitor circuits is presented for analyzing chaos and bifurcation phenomena in nonlinear discrete dynamical systems modeled by discrete maps xn + 1= f(xn) Experimental results are given for four switched-capacitor circuits described by well-known discrete maps; namely, the logistic map, the piecewise-linear unimodal (one-hump) map, the Hénon map, and the Lozi map.

Testing mixed-signal cores: a practical oscillation-based test in an analog macrocell

A formal set of design decisions can aid in using oscillation-based test (OBT) for analog subsystems in SoCs. The goal is to offer designers testing options that do not have significant area overhead, performance degradation, or test time. This work shows that OBT is a potential candidate for IP providers to use in combination with functional test techniques. We have shown how to modify the basic concept of OBT to come up with a practical method. Using our approach, designers can use OBT to pave the way for future developments in SoC testing, and it is simple to extend this idea to BIST.

Testable switched-capacitor filters

A Design for Test methodology for S-C filters is presented, based on an architecture using some additional circuitry and providing extra capabilities for both off-and on-line test. The approach uses a comparison mechanism to indicate whether or not two copies of a filter element (a biquad, for instance) have a similar response during their actual operation. The design and implementation of an integrated filter is included to assess the potential usefulness of this new approach.

A 1.25-V micropower Gm-C filter based on FGMOS transistors operating in weak inversion

This paper presents a novel linearized transconductor architecture working at 1.25 V in a 0.8-/spl mu/m CMOS technology with very low power consumption. The special features of the floating-gate MOS (FGMOS) transistor are combined in weak and strong inversion leading to a simplified topology with fewer stacked transistors and a very low noise floor. The design methodology is thoroughly explained, together with the advantages and disadvantages of working with the FGMOS transistor. Furthermore, second-order effects arising from nonideal behavior of the device are analyzed and limits for the performance are established. Experimental results from a second-order low-pass/bandpass filter that was implemented using the transconductor show a tunability of over one and a half decades in the audio range, a dynamic range of over 62 dB, and a maximum power consumption of 2.5 /spl mu/W. These results demonstrate the suitability of the FGMOS transistor for implementing analog continuous-time filters, while at the same time pushing down the voltage limits of process technologies and simplifying the circuit topologies to obtain significant power savings.

A 1-V micropower log-domain integrator based on FGMOS transistors operating in weak inversion

This paper describes the implementation of a low-power floating-gate MOS (FGMOS)-based log-domain integrator that reduces the minimum required voltage supply and the risk of instabilities. The performance of the block is illustrated with the experimental results of a second-order low-pass/bandpass filter working in the audio range with a 1-V voltage supply and a maximum power consumption of 2 /spl mu/W. The experimental results show that the FGMOS transistor is a powerful device that enables the design of low-voltage-supply low-power-consumption filters which have very simple topologies.

A new strategy for testing analog filters

A new strategy for testing analog filters is presented, based on the reevaluation of the transfer function followed by simple processing of the output signals. Taking advantage of the structural properties of some universal biquads, this new strategy consists in provoking pole-zero cancellation during the test mode, without eliminating information about parameters which determine the normal circuit operation. Although area overhead could seem high, it can be very small in many applications.<<ETX>>