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Dive into the research topics where Aki Fujimura is active.

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Featured researches published by Aki Fujimura.


Proceedings of SPIE, the International Society for Optical Engineering | 2010

Improvement of Mask Write Time for Curvilinear Assist Features at 22nm

Aki Fujimura; Ingo Bork; Taiichi Kiuchi; Tadashi Komagata; Yasutoshi Nakagawa; Kazuyuki Hagiwara; Daisuke Hara

In writing 22nm logic contacts with 193nm immersion, curvilinear sub-resolution assist features will be desirable on masks. Curvilinear sub-resolution assist features are good for high volume chips where the wafer volume outweighs considerations for mask write times. For those chips, even 40 hour write times are tolerated for mask writing. For lower-volume production of SOC designs, such write times are economically unacceptable. 8 to 12 hours of write times are feasible for these designs. Previous papers at 2010 Photomask Japan described model-based mask data preparation (MB-MDP) techniques using circular apertures on production e-beam writers writing curvilinear ideal ILT patterns that reduced e-beam write-times by nearly a factor of two over conventional approach writing Manhattanized ILT patterns. This puts the curvilinear assist features within the realm of high-volume production. However, the write times are still too long for SOC designs. This paper describes a new technique that reduces mask write time further. Resist-exposed SEM images will be shown, written by JEOL JBX-3200MV. E-beam shot count comparisons for an ideal ILT mask pattern will be made with the conventional methods, demonstrating a 44% decrease in blanking time. In addition, a comparison study is shown indicating that an ideal ILT mask pattern that would take 63 hours with conventional fracturing can be written in about 14 hours using MB-MDP. AIMS projected images demonstrate the pattern fidelity on the wafer.


SPIE Photomask Technology | 2011

Optimization of mask shot count using MB-MDP and lithography simulation

Gek Soon Chua; Wei Long Wang; Byoung Il Choi; Yi Zou; Cyrus E. Tabery; Ingo Bork; Tam Nguyen; Aki Fujimura

In order to maintain manageable process windows, mask shapes at the 20nm technology node and below become so complex that mask write times reach 40 hours or might not be writeable at all since the extrapolated write time reaches 80 hours. The recently introduced Model Based Mask Data Preparation (MB-MDP) technique is able to reduce shot count and therefore mask write time by using overlapping shots. Depending on the amount of shot count reduction the contour of the mask shapes is changed leading to the question how the mask contour influences wafer performance. This paper investigates the tradeoff between mask shot count reduction using MB-MDP and wafer performance using lithography simulation. A typical Source-Mask-Optimization (SMO) result for a 20nm technology will be used as an example.


Photomask and Next-Generation Lithography Mask Technology XVIII | 2011

Model-based mask data preparation (MB-MDP) for ArF and EUV mask process correction

Kazuyuki Hagiwara; Ingo Bork; Aki Fujimura

Using Model-Based Mask Data Preparation (MB-MDP) complex masks with complex sub-resolution assist features (SRAFs) can be written in practical write times with todays leading-edge production VSB machines by allowing overlapping VSB shots. This simulation-based approach reduces shot count by taking advantage of the added flexibility in being able to overlap shots. The freedom to overlap shots, it turns out, also increases mask fidelity, CDU on the mask, and CDU on the wafer by writing sub-100nm mask features more accurately, and with better dose margin. This paper describes how overlapping shots enhance mask and wafer quality for various sub-100nm features on ArF masks. In addition, this paper describes how EUV mask accuracy can be enhanced uniquely by allowing overlapping shots.


Proceedings of SPIE, the International Society for Optical Engineering | 2010

Writing 32nm-hp contacts with curvilinear assist features

Aki Fujimura; David Kim; Ingo Bork; Christophe Pierrat

In writing contacts at 32nm half-pitch with 193nm immersion lithography, circular main features and curvilinear subresolution assist features will be desirable on masks. Using conventional methods, the best depth of focus, exposure latitude, and critical dimension uniformity on wafer could only be achieved with unrealizable mask write times. Previous papers have described a gradual improvement over the past two years to avoid this trade-off. For example, Manhattanization of the shapes generated by inverse lithography techniques has reduced the required shot count while maintaining best process windows. Using the MB-MDP technique, total shot count required to print such Manhattanized assist features is further reduced significantly. This paper is the first to present test writing results of 32nm-hp patterns using a conventional variable shaped beam mask writer with the new MB-MDP technique. Using this new technique, best process window and improved critical dimension uniformity are achieved while demonstrating reduced shot count. SEM images of resist patterns written by a production mask writer will be shown.


Journal of Micro-nanolithography Mems and Moems | 2016

Correction of resist heating effect on variable shaped beam mask writer

Noriaki Nakayamada; Mizuna Suganuma; Haruyuki Nomura; Yasuo Kato; Takashi Kamikubo; Munehiro Ogasawara; Harold R. Zable; Yukihiro Masuda; Aki Fujimura

Abstract. The specifications for critical dimension (CD) accuracy and line edge roughness are getting tighter to promote every photomask manufacturer to choose electron beam resists of lower sensitivity. When the resist is exposed by too many electrons, it is excessively heated up to have higher sensitivity at a higher temperature, which results in degraded CD uniformity. This effect is called “resist heating effect” and is now the most critical error source in CD control on a variable shaped beam (VSB) mask writer. We have developed an on-tool, real-time correction system for the resist heating effect. The system is composed of correction software based on a simple thermal diffusion model and computational hardware equipped with more than 100 graphical processing unit chips. We have demonstrated that the designed correction accuracy was obtained and the runtime of correction was sufficiently shorter than the writing time. The system is ready to be deployed for our VSB mask writers to retain the writing time as short as possible for lower sensitivity resists by removing the need for increased pass count.


Proceedings of SPIE | 2011

Model-based mask data preparation (MB-MDP) and its impact on resist heating

Aki Fujimura; Takashi Kamikubo; Ingo Bork

Complex mask shapes will be required on critical layer masks for 20nm logic node, threatening to explode the mask write times. Model-Based Mask Data Preparation (MB-MDP) has been introduced to reduce the shot count required to write complex masks while simultaneously improving resolution and dose margin of sub-100nm features. For production use of MB-MDP, a number of questions have been raised and answered. This paper summarizes these potential issues and their resolutions. In particular, the paper takes an in-depth look at one of the questions: impact of overlapping shots on heating effect. The paper concludes that while heating effect is an important issue for all e-beam writing even with conventional non-overlapping shots, overall dose density per unit time over microns of space is the principal driver behind heating effects. Highly local shot density and shot sequencing does not affect heating significantly, particularly for smaller shots. MB-MDP does not introduce any additional concerns.


Proceedings of SPIE, the International Society for Optical Engineering | 2010

Best depth of focus on 22-nm logic wafers with less shot count

Aki Fujimura; David Kim; Tadashi Komagata; Yasutoshi Nakagawa; Vikram Tolani; Tom Cecil

The contact layer for the 22 nm logic node faces many technological hurdles. Even using techniques such as multiple-exposure patterning and 193 nm immersion, it will be difficult to achieve the depth of focus and CD uniformity required for 22 nm production. Such difficulties can be mitigated by recent advances in Inverse Lithography Technology (ILT). For example, circular main features combined with complex curvilinear assist features can provide superior CD uniformity with the required depth of focus, particularly for isolated contacts. However, such a solution can lead to long mask write times, because the curvilinear shapes necessitate a higher shot count induced by inefficient data fracturing, even without considering the circular main features. The current approach is to Manhattanize the curvilinear features resulting in a nearly equivalent image quality on the wafer; but a further reduction in mask write times could help lower costs. This paper describes a novel mask-writing method that uses a production e-beam mask writer to write main features as circles, with curvilinear assist features, while reducing shot count compared to traditional Manhattanized masks. As a result the new method makes manufacturing of ideal ILT-type masks feasible from a technical as well as from an economic standpoint. Resist-exposed SEM images are presented that validate the new method.


Photomask Japan 2017: XXIV Symposium on Photomask and Next-Generation Lithography Mask Technology | 2017

GPU-accelerated inline linearity correction: pixel-level dose correction (PLDC) for the MBM-1000

Harold Robert Zable; Hironobu Matsumoto; Kenichi Yasui; Ryosuke Ueba; Noriaki Nakayamada; Nagesh Shirali; Yukihiro Masuda; Ryan Pearman; Aki Fujimura

Over the last two decades, eBeam mask writers have added inline correction features. Particularly when minimum feature sizes on mask went below 100nm a decade ago, the need for more precision within a reasonable write time increased the demand for more corrections. Inline correction is better for turnaround time and throughput, but inline correction is computationally limited because it is unacceptable for computation to limit the machine write time. Simultaneously, the same need for linearity correction, printability enhancement, and resilience to manufacturing variation has caused much innovation in offline mask data preparation and mask process correction. Typically, the writer performs inline correction for backscatter, fogging, loading, charging and thermal effects, but leaves <10μm effects to offline correction. With multi-beam writers, the write time is independent of shape count. Any set of input shapes is rasterized to a set of arrays of equal sized pixels that are each independently dosed to write the desired shapes. Multi-beam writers also have a certain minimum write time that is required for writing even a very small number of simple shapes. This gives rise to the possibility of providing linearity correction features, even for the short-range effects as inline correction in the writer. Such inline correction has zero impact on throughput and turnaround time of mask making. This paper introduces the GPU-accelerated inline linearity correction capability of the NuFlare MBM-1000 for the first time.


Photomask Technology | 2017

Full-chip GPU-accelerated curvilinear EUV dose and shape correction

Aki Fujimura; Oleg Syrel; Ali Bouaricha; Mariusz Niewczas; Bo Su; Linyong Pang; Harold R. Zable; Ryan Pearman; Abhishek Shendre

With both 193i multiple patterning and EUV technologies, the constraints on the mask manufacturability are becoming increasingly stringent. The necessity for understanding curvilinear shapes implicitly in design (for ILT and EUV) or OPC correction (corner-rounding effects) along with new multi-beam mask writing systems mean the mask manufacturers are at an inflection point: whether the mask shapes are described as curvilinear targets or complex rectilinear targets, the actual mask shapes after exposure are curvilinear and must be accounted for correctly for wafer lithography. We present a GPU-accelerated intrinsically curvilinear mask data preparation system, compatible with both VSB and multi-beam systems, that is capable of full-ship simultaneous shape and dose correction using arbitrary (non-Gaussian) kernels for model shape and dose effects.


Photomask Japan 2017: XXIV Symposium on Photomask and Next-Generation Lithography Mask Technology | 2017

Mask CD relationship to temperature at the time backscatter is received

Harold Robert Zable; Tom Kronmiller; Ryan Pearman; Bill Guthrie; Nagesh Shirali; Yukihiro Masuda; Takashi Kamikubo; Noriaki Nakayamada; Aki Fujimura

Mask writers need to be able to write sub-50nm features accurately. Nano-imprint lithography (NIL) masters need to create sub-20nm line and space (L:S) patterns reliably. Increasingly slower resists are deployed, but mask write times need to remain reasonable. The leading edge EBM-9500 offers 1200A/cm2 current density to shoot variable shaped beam (VSB) to write the masks. Last year, thermal effect correction (TEC) was introduced by NuFlare in the EBM-95001. It is a GPU-accelerated inline correction for the effect that the temperature of the resist has on CD. For example, a 100nm CD may print at 102nm where that area was at a comparably high temperature at the time of the shot. Since thermal effect is a temporal effect, the simulated temperature of the surface of the mask is dynamically updated for the effect of each shot in order to accurately predict the cumulative effect that is the temperature at the location of the shot at the time of the shot and therefore its impact on CD. The shot dose is changed to reverse the effects of the temperature change. This paper for the first time reveals an enhancement to this thermal model and a simulator for it. It turns out that the temperature at the time each location receives backscatter from other shots also make a difference to the CD. The effect is secondary, but still measurable for some resists and substrates. Results of a test-chip study will be presented. The computation required for the backscatter effect is substantial. It has been demonstrated that this calculation can be performed fast enough to be inline with the EBM-9500 with a reasonable-sized computing platform. Run-time results and the computing architecture will be presented.

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