Akiko Ohata

Observation of random telegraph signals: Anomalous nature of defects at the Si/SiO2 interface

Current fluctuations with discrete levels, which are called random telegraph signals (RTSs), have been studied in small size metal‐oxide‐semiconductor field‐effect transistors (MOSFETs) from both viewpoints of relative current change and of correlated switchings. A large relative current change of as much as 30% has been observed, even at room temperature. It behaves similarly as normal small RTSs in terms of statistics and temperature dependence. RTSs have been found also in 20‐μm channel width MOSFETs. These results require another mechanism to explain RTSs in addition to simple Coulomb scattering or number fluctuation. It is emphasized that an interaction between defects at the Si/SiO2 interface is necessary to understand the correlated RTSs. The experimental results are reasonably reproduced by a model calculation assuming interacting defects. It is also pointed out that new RTSs generated by electrical stress might be a serious concern in lower submicron devices.

Performance and reliability concerns of ultra-thin SOI and ultra-thin gate oxide MOSFETs

Inversion layer mobility in thin SOI MOSFETs has been investigated from the viewpoint of the SOI thickness effects on device performance. Next, thin oxide properties such as Qbd, Vgt, Dit, and SILC have been studied as a function of oxide thickness. It is demonstrated that there is a small window for high reliability in ultra-thin SiO/sup 2/ regime.

Coulomb blockade effects in edge quantum wire SOI-MOSFETs

Edge quantum wire MOSFETs were fabricated using the sidewall of an ultrathin SOI, and the electrical characteristics were investigated. In this device, current oscillations for gate voltage sweeping were clearly observed at 4.2 K. This effect is considered from the viewpoint of the Coulomb oscillations in the multijunction system on the edge quantum wire. Furthermore, we focus on two concerns regarding the application of the single electron tunneling (SET) devices. One concern is the phase instability of the Coulomb oscillations due to trapped or floating charges around the SET devices. To overcome this problem, we propose a double-gate edge SOI MOSFET. In fact, it is experimentally confirmed that the Coulomb oscillation phase is tunable. The other concern is the low driving capability of SET devices. To improve this, it has also been experimentally demonstrated that the direct transmission of SET signals to the conventional MOSFET current is possible. This means that the output impedance can be transformed locally or globally from high to low in the SET-device circuits hybridized with CMOS devices.

Silicon-Based Single-Electron-Tunneling Transistor Operated at 4.2 K

We have fabricated single-electron-tunneling transistors using silicon which is a useful material for device applications. The device is composed of thin polycrystalline silicon film patterned by electron-beam lithography and its thermally grown oxidized film. We have observed, in this device, periodic conductance oscillations as a function of gate voltage and nonlinear resistances as a function of drain voltage at 4.2 K. These experimental results are in agreement with the theory of Coulomb blockade. We conclude that the observed behavior results from the charging energy of single-electron tunneling.

Silicon single-electron tunnelling device interfaced with a CMOS inverter

A silicon single-electron tunnelling (SET) device with an oxidation-controlled narrow channel was fabricated on a silicon-on-insulator substrate. Measurements at liquid helium temperature show the clear Coulomb blockade effects. The Coulomb oscillations of the SET device are successfully transformed to voltage oscillations by combining it with an nMOSFET load. In addition, it is demonstrated that the obtained small voltage signals are amplified with a CMOS inverter operating at room temperature. These results constitute an important step toward the future hybrid Si ULSIs of SET and CMOS devices.

From Ballistic to Coulomb Blockade Transport in Si Metal Oxide Semiconductor Field Effect Transisters

By using a split-gate-type Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with four finger gates, the small-area inversion layer conductance in the regime of ballistic transport has been investigated. This device enables us to perform four-probe measurements in a very small area, by which the large series resistances of two-dimensional inversion layers are deduced. At 4.2 K, clear conductance plateaus that reflect the valley degeneracy of Si-MOSFETs on a (100) wafer were observed without correction. Furthermore, under the threshold voltage, clear Coulomb blockade oscillations were also observed. The interplay between ballistic transport and Coulomb blockade would be an interesting subject for further study.

Merits and Demerits of Single Electron Effects in Ultrasmall Semiconductor Devices

Anomalous telegraphic noise with four-level current fluctuations due to two interactive random telegraph signals (RTSs) in small-area metal-oxide-semiconductor field-effect transistors (MOSFETs) is reported. From the noise pattern and discussions on the charging energy of a trap, the existence of interactive traps is demonstrated. Furthermore, the problem of a floating-dot-gate memory cell is discussed from the viewpoint of the existence of interaction between traps, which implies that the threshold voltage could be affected by the spatial distribution of dots in a multi-dot floating-gate memory cell.

A study of quantum interference fluctuations in deep sub-/spl mu/m MOSFET's under cryogenic conditions

We investigated the phase coherence length, l/sub /spl phi//, in large Si-MOSFETs fabricated using current process technology, with a particular emphasis on highly doped silicon substrates, and then studied the effects of quantum conductance fluctuations in deep sub-/spl mu/m MOSFETs, with channel length comparable to l/sub /spl phi//. We identified, in a 0.2 /spl mu/m MOSFET, universal conductance fluctuations in the strong inversion regime and conductance fluctuations due to variable range hopping in the weak inversion regime. The drain bias dependence of these fluctuations indicates clearly that they become a serious concern only at drain voltages lower than 10 mV. Therefore, even if the wave nature of electrons results in quantum conductance fluctuations, it will not lead to a limitation on device miniaturization in future Si-ULSIs. >

Magneto-transport study in restricted MOS inversion layers

Abstract We investigated the transport properties in narrow channel Si-MOSFETs in the strongly localized regime, where aperiodic conductance oscillations have been observed as a function of gate voltage. We focus our attention upon the well defined peak structure in the oscillatory conductance and discuss it from the viewpoint of variable range hopping between a particular pair of hopping sites in a very narrow inversion channel. We also studied magnetostructure up to 9 T at 4.2 K and found a large positive magnetoconductance (∼ 20%) in a magnetic field perpendicular to the sample in the strongly localized regime. We attribute this large positive magnetoconductance to interference between restricted hopping paths in a very narrow conduction channel.

Electrical Transport Properties in the Restricted MOS Inversion Layers

We have studied transport properties of very narrow inversion channel in SI-MOSFETs. Aperiodlc conductance fluctuations ln strongly Iocalized regine have been found at low tenperature. Peak and valley positions in d-Vg curve are independent of tenperature and of nagnetic field. We have investigated the structures from a viewpoint of one particular variable range hopping in the long channel. Tenperature dependence of the peak conductance provides the enerry spacing between a pair of hopping sites, and the electron density of states in the strongly 1ocalized regine.