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Albrecht Kieslich

Infineon Technologies

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Publication

Featured researches published by Albrecht Kieslich.

Archive | 2002

Stacked via with specially designed landing pad for integrated semiconductor structures

Lothar Bauch; Thomas Zell; Matthias Lehr; Albrecht Kieslich

Archive | 2002

Method for fabricating a semiconductor product with a memory area and a logic area

Werner Graf; Albrecht Kieslich

Archive | 2000

Method for fabricating a microelectronic structure

Jürgen Amon; Albrecht Kieslich

Archive | 2002

Method for planarizing an isolating layer

Klaus Feldner; Werner Graf; Albrecht Kieslich; Hermann Sachse

Archive | 2000

Method for producing an insulation

Albrecht Kieslich; Klaus Feldner; Herbert Benzinger

Archive | 2002

Mask for fabricating semiconductor components

Albrecht Kieslich; Hermann Sachse

Archive | 2006

Method for fabricating through-holes with different sizes e.g. for integrated circuit, requires use of auxiliary layer for generating different structural sizes

Dirk Offenberg; Albrecht Kieslich; Stephan Wege

Archive | 2002

Method of forming a bitline and a bitline contact, and dynamic memory cell including a bitline and bitline made contact according to the method

Albrecht Kieslich

Archive | 2001

Compact semiconductor structure

Falko Höhnsdorf; Albrecht Kieslich; Detlef Weber

Archive | 2000

Patterning of content areas in multilayer metalization configurations of semiconductor components

Matthias Lehr; Albrecht Kieslich; Peter Thieme; Lars Voland

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Collaboration

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Klaus Feldner

Infineon Technologies

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Werner Graf

Infineon Technologies

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Detlef Weber

Infineon Technologies

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Herbert Benzinger

Infineon Technologies

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Hermann Sachse

Infineon Technologies

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Lars Voland

Infineon Technologies

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Matthias Lehr

Infineon Technologies

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Peter Thieme

Infineon Technologies

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Falko Höhnsdorf

Infineon Technologies

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Kevin Pears

Infineon Technologies

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