Ali Beydoun

Frequency-Band-Decomposition converters using continuous-time Sigma-Delta A/D modulators

Frequency-Band-Decomposition (FBD) is a good candidate to increase the bandwidths of ADC converters based on Sigma-Delta modulators, especially in the context of software radio, where very large bands need to be converted. Each modulator processes a part of the input signal band and is followed by an adapted digital filter. A new solution, called Extended Frequency-Band-Decomposition (EFBD) has been proposed during the ANR VersaNUM project, allowing large mismatches in the analog modulators without performance degradation, at the price of a calibration of the digital stage. This paper is an abstract of the whole project and presents its main results.

Timing synchronisation method for MIMO-OFDM system using orthogonal preamble

The benefits of OFDM (Orthogonal Frequency Division Multiplexing) include resistance against RF interference, high spectral efficiency and lower multipath distortion, while MIMO (Multi-Input Multi-Output) system increases the bandwidth due to the propagation of signals using multiple transmit antennas. The timing synchronization in MIMO-OFDM system, is the main challenge in order to detect the header of each received frame. In this paper, a new timing synchronization method based on orthogonal codes is proposed. Simulation results, for the proposed method, show a good performance for timing synchronisation for MIMO-OFDM system by using some LTE parameters.

A novel digital calibration technique for gain and offset mismatch in parallel TIΣΔ ADCs

Time interleaved sigma-delta architecture is a potential candidate for high bandwidth analog to digital converters required for reconfigurable, versatile and multistandard receivers. However, this architecture is very sensitive to the unavoidable gain and offset mismatch resulting from the manufacturing process. This paper presents a novel digital calibration method for gain and offset mismatch. This new method takes advantage of the digital signal processing on each channel to reconstruct the useful signal and requires only few logic components for implementation. The run time calibration is estimated to 10 and 15 clock cycles for offset and gain mismatches respectively.

A 65 nm CMOS versatile ADC using time interleaving and ΣΔ modulation for multi-mode receiver

High performances wideband Analog to Digital Converter (ADC) remains a bottleneck to realize software and cognitive radio receivers. Time Interleaved Sigma-Delta (TIΣΔ) architecture is a good candidate to increase the bandwidth of the data converters with the lowest hardware complexity compared to other solutions using parallel sigma-delta modulators. This paper proposes a reconfigurable 4 channels TIΣΔ using the novel GMSCL (General Multi Stage Closed Loop) sigma-delta architecture and a new digital processing reducing considerably the hardware complexity. The sigma-delta modulators have been designed using switched-capacitor technique and implemented with STMicroelectronis 65 nm CMOS technology. Three different scenarios are possible : the first one for GSM standard clocked at 26 MHz and consumes 2.59 mW, the second one for UMTS/DVB-T standards clocked at 208 MHz and consumes 46 mW and the last one for WiFi/WiMax standards clocked at 208 MHz and consumes 92 mW. The total circuit die area is equal to 3 mm2. The digital filtering was validated and synthesized in a 1.2 V, 65 nm CMOS process using VHDL language. For a clock rate of 208 MHz, the evaluated die area is 0.115 mm2.

A 65 nm CMOS digital processor for multi-mode time interleaved high-pass ΣΔ A/D converters

Digital processing in Time Interleaved High-Pass Sigma-Delta (TIHPΣΔ) Analog to Digital Converter (ADC) remains a bottleneck to realize high performances data converters. This paper proposes a new digital filter architecture which use Comb-filter cells. Comparing to existing solutions, our circuit reduces considerably complexity and power consumption of the digital post-filtering at the back end of the TIHPΣΔ. The proposed solution was validated and synthesized in a 1.2 V , 65 nm CMOS process using VHDL language. For a clock rate of 220 MHz, the evaluated power consumption and die area are 12 µW and 0.13 mm2 respectively.

Optimization of the noise transfer function of Extended-Frequency-Band-Decomposition sigma-delta A/D converters

Frequency-band-decomposition (FBD) is a good candidate to increase the bandwidths of ADC converters based on sigma-delta modulators. Each modulator processes a part of the input signal band and is followed by a digital filter. In the case of large mismatches in the analog modulators, a new solution, called extended frequency-band-decomposition (EFBD) can be used. This solution allows for, for example, a four percent error in the central frequencies without significant degradation in the performance when the digital processing part is appeared to the analog modulators. A calibration of the digital part is thus required to reach these theoretical performance. This paper will focus on a self-calibration algorithm for an EFBD. The algorithm helps minimize the quantization noise of the EFBD.

A New Adaptive Filter Approach for Acoustic Echo Canceller in Teleconference Systems

Agriculture and livestock are the main socio-economic activities of the population of the Zinder region (Niger). However, these activities have negative impacts on groundwater quality, which is the main source of water supply for this population. In this work, the physicochemical quality of the waters of the Socle of the Zinder region was studied during the rainy and dry seasons. Twenty-four samples were the subject of a physico-chemical analysis. The data obtained were processed by the hydrochemical method by the Diagram software and the principal component analysis by the XLSTAT software. Of the waters analyzed, 83% have normal pH values (6.5 - 8.5) and 17% acid pH <6.5 during both seasons. The nitrate levels of Yekoua (62.04 and 63.36 mg.L-1), Dan Ladi (123.64 and 146.96 mg.L-1), Bourbourwa (64.65 and 80.08 mg.L -1) and Kazoe (130.68 and 124.52 mg.L-1) and fluoride of Kazoe (1.5 mg.L-1), Midik (1.6 mg.L-1) and Bourbourwa (2.98 mg.L-1) during both seasons are abnormal. Four facies characterize the analyzed waters, with a predominance of bicarbonated calci-magnesian(42%) during the rainy season, calci-magnesian bicarbonate (41.7%) and calci-magnesium chloride (41.7%) during the dry season. The residence time by hydrolysis and alteration of silicate rocks and the pluviolessivage of soils are the main mechanisms that govern the mineralization of these waters. These grades, call for remediation treatments. Clays could be promoters for this treatment because they are very available and less expensive.The choice of modification technique for a communications system depends to a large extent on the nature and characteristics of the medium in which it must operate (Hrasnica et al., 2005). In a PLC (Power Line Communications) system, the first applications in the LDR band (oriented to the control of devices) operated with monocarrier modulations, such as ASK, BPSK, and FSK. This allows for low implementation costs, provided that it operates at low data rates and with an error correction system. It is clear that applications require a higher data rate. The modulation technique must overcome challenges such as the necessary equalization for the cause of the non-linearity of the channel, or avoid the propagation delays and the multipath caused by the impedance differences in the branches. Likewise, it must offer flexibility and avoid the use of certain frequencies if they are altered or assigned to another service and, therefore, cannot be used in PLC. In this scenario, one of the techniques that have been imposed in the most used developments in NB-PLC as in BB-PLC has been Orthogonal Frequency Division Multiplexing (OFDM). One of its most attractive aspects from the point of view of its complexity is the possibility of implementing the structure of its multifrequency modulation and demodulation scheme through a simple Inverse Discrete Fourier Transform (IDFT) and its corresponding direct transform, Fast Fourier Transform (FFT). Based on this technique, an appropriate transceiver scheme for operating on a PLC channel model was presented. This development implements the error correction technique proposed for NB-PLC.

A new interpolation technique for TI ΣΔ A/D converters

Time interleaved sigma-delta converter is a potential candidate for multi-mode wideband analog to digital (A/D) converters dedicated for multistandard receivers. However, the interpolation by zeros recquired to compress the useful signal bandwidth at the input of the sigma-delta modulator imposes constraints on the implementation of the analog part leading to a very large die area due to the high value required for the sampling capacitor. This paper proposes a new interpolation technique using extra samples instead of zeros resulting from the oversampling of the input signal. This new technique not only reduces the die area but also the anti-alias filter order. The proposed technique was validated in a 4 channel time interleaved sigma-delta multi-mode A/D converter designed in 1.2 V 65 nm CMOS process.

A digital correction technique for channel mismatch in TI ΣΔ ADCs

Time interleaved sigma-delta analog to digital converter seems to be a potential solution for wide bandwidth analog to digital converter with the lowest hardware complexity compared to other solutions using parallel sigma-delta modulators. Its performance depends on the digital filter and is very sensitive to the channel mismatch. This paper summarizes our work on the digital signal processing for this kind of converter, including filtering, decimation and channel mismatch correction in order to reduce the implementation complexity while minimizing the channel mismatch effect.

Fixed-step simulation of Continuous-Time ΣΔ modulators

A methodology for the simulation of continuous time sigma-delta (CTSigmaDelta) converters is presented in this paper. This method permits the simulation of SigmaDelta modulators employing continuous-time filters using a fixed-step algorithm. The analysis method is based on the discretization of a continuous-time model and using a discrete simulator, which is more efficient than an analog simulator. In our analysis approach, each sampling- period is divided into a fixed number of steps. This transformation is exact in term of Noise Transfer Function and asymptotically exact in term of Signal Transfer Function (the Signal Transfer Function of the model rapidly tends to the continuous time model transfer function when the number of steps increases). Moreover, the ideal step-size can be estimated from the bandwidth of the input signal.