Anthony P. Fattorini

Impact of Bias and Device Structure on Gate Junction Temperature in AlGaN/GaN-on-Si HEMTs

The thermal impact of device bias-state and structures (such as source connected field plates, gate-pitch, back-vias, and number of gate fingers) in AlGaN/GaN-on-Si high electron mobility transistors (HEMTs) are measured using gate metal resistance thermometry (GMRT). The technique characterizes the thermal response of device gate metallization to determine the gate-epilayer junction temperature (Tj), which is directly influenced by the channel heat source due to its close proximity. It is found that low gate leakage levels in GaN HEMTs make them favorable candidates for GMRT. Bias-dependent self-heating, independent of power dissipation, is observed in the devices. Therefore, Tj of different device configurations are compared at constant bias state, as well as constant power density (3.75 W/mm) to improve accuracy. Tj reduction is observed at high drain bias due to the migration of the channel heat source toward the gate field plate edge. This provides independent experimental validation for a reported electrothermal model [7]. A 3-D thermal finite element method model is presented, which simulates measured Tj rise to within ~6% across a range of device configurations and operating conditions. This is ultimately made possible upon implementation of a thermal boundary resistance layer and extraction of its temperature response using GMRT data.

Study of Gate Junction Temperature in GaAs pHEMTs Using Gate Metal Resistance Thermometry

Gate junction temperature is presented as the crucial parameter for modeling thermal degradation in GaAs device reliability studies, and sufficient for modeling the impact of temperature on device terminal characteristics. Gate metal resistance thermometry (GMRT) is applied to a GaAs pseudomorphic high-electron mobility transistor to measure its gate junction temperature. It is found that gate leakage current due to impact ionization can interfere with dc GMRT measurements. To the best of our knowledge, for the first time it is demonstrated that this can be largely avoided by instead applying an ac version of GMRT. However, the dynamic resistance of the gate leakage current path can interfere with ac GMRT. Measurements and thermal finite element method simulations of devices at constant power dissipation conclude that the bias dependence of the channel heat source profile affects the gate junction temperature. A parameter extraction technique is presented and used in device lifetime calculations to demonstrate MTTF variations of more than an order of magnitude (despite fixed power) due to bias-dependent self-heating.

A scalable linear model for FETs

A small-signal model of the intrinsic region of a microwave FET that considers four capacitance terms is examined. Four reactive terms in the model are required to describe four imaginary Y -parameter terms. The addition of a fourth capacitance rather than a channel resistance or delay term enables extraction of dispersion-free parameters, better consistency with a large-signal model and better scaling properties. An important aspect of the model topology is clear separation of resistive and reactive elements so that transconductance and output conductance correspond to real parts of the Y -parameters. It is shown that this has an impact on the scaling of noise models that are formulated in terms of these resistive parameters.

35 dBm, 35 GHz power amplifier MMICs using 6-inch GaAs pHEMT commercial technology

A 3.5 watt, 35 GHz power amplifier MMIC has been developed. The amplifier exhibits high performance at low processing cost, through the use of a commercially available 6-inch, 0.15-μm pHEMT process with 100 μm thick substrate. The single-ended four stage amplifier MMIC has 22 dB of gain at 35 GHz, 3.5 watts saturated output power (35.5 dBm), and power added efficiency of more than 25%, within a chip size of 12.75 mm2. In terms of power density, this is 740 mW/mm, which is to the authors’ knowledge the best reported for fully matched GaAs pHEMT MMICs on 100-μm substrates at millimetre-wave frequencies.

Full ETSI E-Band Doubler, Quadrupler and 24 dBm Power Amplifier

A GaAs pHEMT frequency doubler, a quadrupler and a power amplifier for E-band applications have been demonstrated to achieve useful output power and power added efficiency (PAE) over a wide bandwidth. The doubler and quadrupler circuits include medium power amplifiers to increase their gain and output power. The doubler has a measured output power greater than 15 dBm over the entire 15 GHz bandwidth of the European Telecommunications Standards Institute (ETSI) E-band specification. The quadrupler has similar output power over the ETSI E bands with a maximum output power of 19.2 dBm. The power amplifier has a maximum measured output power of 24.2 dBm (265 mW) and exceeds 23 dBm (200 mW) over the ETSI E bands. This amplifier has a measured small signal gain of 15 dB and the input and output return losses exceed 15 dB. Its measured PAE is above 8% across the ETSI E bands. This is the highest saturated output power (Psat) and PAE for a power amplifier spanning the full 71 to 86 GHz span of the ETSI E bands for any semiconductor system. Good agreement is demonstrated between measurement and simulation.

Packaged, Integrated 32 to 40 GHz Millimeter-Wave Up-Converter

A 4 × 4 mm QFN overmoulded packaged up-converter has been developed for the 38 GHz point-to-point radio band. The MMIC contains LO-doubler-buffer amplifier, image-reject balanced mixer and RF amplifier with linear gain control and consumes 1.5 watts DC. The up-converter has 7 dB conversion gain, 15 dB image rejection, 15 dB of gain control, 20 dBm IIP3 and 50 dB LO-to-RF isolation in the mixer. Performance is similar in the 32 GHz band. The up-converter represents the state of the art in performance and cost.

Steady state and transient thermal analyses of GaAs pHEMT devices

GaAs pHEMT thermal reliability test structures are introduced which incorporate on-wafer heating using Thin Film Resistors (TFR) and a DC gate metal temperature measurement method. Results from 3D Finite Element Method (FEM) thermal simulations are compared with measurements and used to investigate the frequency response of device self-heating. Comparisons are made with existing thermal models. The influence of individual device structures on the thermal characteristics of an entire device is investigated and the epitaxial layers are seen to have a large impact on overall performance. Bias dependent self-heating, independent of thermal dissipation is observed and attributed to confinement of the thermal source as the drain voltage is increased.

Measurement and Modeling of Thermal Behavior in InGaP/GaAs HBTs

Thermal-impedance models of single-finger and multifinger InGaP/GaAs heterojunction bipolar transistors (HBTs) are extracted from low-frequency S-parameters that are measured on wafer and at room-temperature, and from temperature-controlled dc measurements. Low-frequency S-parameters at room temperature are accurate for extracting thermal corner frequencies. However, the dc value of the thermal impedance depends on the emitter resistance and the dc current definitions of the HBT model; hence, they need to be extracted together from temperature-dependent dc measurements. The resulting thermal-impedance model explains the low-frequency dispersion well at varying bias conditions, and it is suitable for nonlinear circuit analysis.

Accurately measured two-port low frequency noise and correlation of GaAs based HBTs

Accurately measured low frequency noise and correlation of GaAs based Heterojunction Bipolar Transistors (HBTs) have been reported between 10 Hz and 100 kHz. The system noises were removed from the data linearly, using noise correlation matrices. Noise shapes and correlation coefficients of HBTs from separate test pieces and of two emitters sizes were compared to reveal possible aging effects. Simulated 1/ƒ noise with a simple non-linear transistor model was used to verify the accuracy of the method.

Impact of Diode Geometry on Local Oscillator Breakthrough in Sub-Harmonic Mixers

An investigation in to the asymmetry of the current-voltage characteristics and the local-oscillator breakthrough in anti-parallel diode sub-harmonic mixers is presented. Twenty nine bare anti-parallel diode pair circuits, have been used to identify those aspects of the diode geometry, that have a strong influence on the diode mismatch and consequently the local-oscillator breakthrough. The circuits were fabricated on a six-inch gallium arsenide high electron mobility transistor process.