Anup P. Omprakash

A 0.8 THz

We demonstrate record ac performance (0.8 THz) for a silicon-germanium heterojunction bipolar transistor (SiGe HBT) operating at cryogenic temperatures. An extracted peak fMAX of 798 GHz (peak fT of 479 GHz) at 4.3 K was measured for a device with a BVCEO of 1.67 V. This scaled SiGe HBT also exhibits excellent thermal properties, as required from an electro-thermal reliability perspective. Taken together, these results strongly suggest that at the limits of scaling, robust, and manufacturable SiGe HBTs designed for room temperature operation are likely to achieve THz speeds.

f_{\rm MAX}

This paper presents an investigation of the impact of single-event transients (SETs) and total ionization dose (TID) on precision voltage reference circuits designed in a fourth-generation, 90-nm SiGe BiCMOS technology. A first-order uncompensated bandgap reference (BGR) circuit is used to benchmark the SET and TID responses of these voltage reference circuits (VRCs). Based on the first-order BGR radiation response, new circuit-level radiation-hardening-by-design (RHBD) techniques are proposed. An RHBD technique using inverse-mode (IM) transistors is demonstrated in a BGR circuit. In addition, a PIN diode VRC is presented as a potential SET and TID tolerant, circuit-level RHBD alternative.

SiGe HBT Operating at 4.3 K

This paper examines the fundamental reliability differences between n-p-n and p-n-p SiGe HBTs. The device profile, hot carrier transport, and oxide interface differences between the two device types are explored in detail as they relate to device reliability. After careful analysis under identical electrical stress conditions for n-p-n and p-n-p, the differences in activation energies for the damage of the oxide interfaces of the two devices is determined to be the primary cause for accelerated degradation seen in p-n-p SiGe HBTs. An analytical model has been adapted for simulating these aging differences between p-n-p and n-p-n devices. This paper has significant implications for predicting the degradation of complementary SiGe HBTs and even engineering future generations with well-matched n-p-n and p-n-p device-level reliability.

Single-Event Transient and Total Dose Response of Precision Voltage Reference Circuits Designed in a 90-nm SiGe BiCMOS Technology

We present the first measurement results of a highly scaled, 90-nm silicon-germanium heterojunction bipolar transistor (SiGe HBT) operating at cryogenic temperatures as low as 70 mK. The SiGe HBT exhibits a transistor-like behavior down to 70 mK, but below 40 K, the transconductance suggests the presence of nonequilibrium transport mechanisms. Despite the non-ideal base current at cryogenic temperatures, a dc current gain (β) > 1 is achieved for IC > 1 nA, suggesting that ultralow-power low-noise amplifiers should be viable. Exposure of the SiGe HBT to strong magnetic fields (±14 T) is also presented to help understand the nature of the non-ideal

Physical Differences in Hot Carrier Degradation of Oxide Interfaces in Complementary (n-p-n+p-n-p) SiGe HBTs

For the first time, the high temperature (to 300°C) DC and AC performance of a > 100 GHz f_T/f_max SiGe HBTs on thick-film SOI are investigated for their potential use in emerging energy sector, automotive, and aerospace applications. Metrics such as current gain (β_F), BV_CEO, M-1, f_T, f_max are extracted from 24°C to 300°C and compared with a bulk SiGe HBT platform. The results demonstrate that while there are degradation to key device metrics at high temperatures, the devices are still usable over a wide temperature range. Additionally, while SOI is known for its high thermal resistance, it is demonstrated that the device is constrained by electrical effects rather than thermal effects at higher temperatures, which should therefore yield acceptable reliability.

Operation of SiGe HBTs Down to 70 mK

Large-signal (P1 dB) and small-signal (OIP3) radio frequency (RF) linearities of silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) fabricated in a new fourth-generation 90-nm SiGe BiCMOS technology operating at cryogenic temperatures are investigated. The SiGe BiCMOS process technology has an fT/fmax of 300/350 GHz. SiGe HBTs with two different layout configurations, collector-base-emitter (CBE) and CBE-base-collector (CBEBC), were characterized over temperature. Both dc and ac figures-of-merit are presented to aid in understanding the linearity, and to provide an overall performance comparison between the two layout configurations. The extracted peak fT/fmax for CBE and CBEBC at 78 K are 387/350 and 420/410 GHz, respectively. The P1 dB and OIP3 linearity metrics for both configurations are comparable. Source- and load-pull measurements were performed at each temperature at 8 and 18 GHz, with the devices biased at a JC of 18 mA/μm2. Two-tone measurements over bias were also performed at 300 and 78 K with 50-Ω terminations for the source and load impedances. The 50 Ω results follow a similar response to the source-and load-pull measurements at 300 and 78 K, and demonstrate that the small-signal linearity of the SiGe HBTs is not adversely impacted by operation at cryogenic temperatures. The CBEBC configuration demonstrated the most consistent RF linearity performance at cryogenic temperature out of the two layout options.

On the potential of using SiGe HBTs on SOI to support emerging applications up to 300°C

This paper presents an overview of the various failure mechanisms observed when a SiGe HBT is operated outside of traditionally-defined electrothermal safe operating areas (SOAs). The concepts of hard and soft safe operating area (SOA) boundaries are defined in this work. This provides two different viewpoints which determine the degradation and failure of a SiGe HBT as a function of bias conditions. Measurements were performed on state-of-the-art SiGe HBTs to measure the hard SOA boundaries in terms of physical parameters such as geometry, layout configuration, and temperature. The outcomes of this work can serve as the stepping-stone to a “red flag” warning mechanism for the detection of hard SOA boundaries within a circuit design environment.

On the Cryogenic RF Linearity of SiGe HBTs in a Fourth-Generation 90-nm SiGe BiCMOS Technology

Total ionizing dose (TID) effects are evaluated for a high-voltage (>30 V) complementary SiGe on SOI technology. Devices are irradiated with 10-keV X-rays at doses up to 5 Mrad(SiO2). The results depend strongly on collector-to-emitter bias, in both forward- and inverse-mode. An anomalous reduction in current gain at high injection in forward-mode operation is observed at doses >500 krad(SiO2). Calibrated 2-D TCAD simulations suggest that this high injection phenomenon is primarily due to interface traps near the STI/Si interface, which is exhibited as a collector resistance increase in the forward Gummel characteristics. Additionally, a strong collector doping dependence is observed, which indicates that this is primarily driven by the thick and lightly doped collector used in this technology. These results illustrate, that high concentrations of interface traps at the STI can have a strong impact on the forward-mode TID response of SiGe HBTs.

Predicting hard failures and maximum usable range of sige HBTs

High-current pulsed stress measurements are performed on SiGe HBTs to characterize the damage behavior and create a comprehensive physics-based TCAD damage model for Auger-induced hot-carrier damage. The Auger hot-carrier generation is decoupled from classical mixed-mode damage and annealing on the output plane by using pulsed stress conditions to modulate the self-heating within the device under stress. The physics of high-current degradation is analyzed, and a temperature dependent degradation model is presented. This model is the first of its kind in both the CMOS and bipolar communities and solves a significant portion of the puzzle for predictive modeling of SiGe HBT safe-operating-area (SOA) and reliability.

Total Ionizing Dose Effects on a High-Voltage (>30V) Complementary SiGe on SOI Technology

The RF cryogenic performance of ultra-low-loss, wideband (DC to 40 GHz) single-pole double-throw (SPDT) RF switches implemented in a 180 nm SOI CMOS technology is reported for the first time. Results show that the switch insertion loss (IL), isolation (ISO), small- and large-signal linearity all improve as the temperature decreases. DC characterization of individual transistors was performed and analyzed to provide insight into the mechanisms underlying the observed changes in the RF switches.