Partha S. Chakraborty

Record maximum oscillation frequency in C-face epitaxial graphene transistors.

The maximum oscillation frequency (fmax) quantifies the practical upper bound for useful circuit operation. We report here an fmax of 70 GHz in transistors using epitaxial graphene grown on the C-face of SiC. This is a significant improvement over Si-face epitaxial graphene used in the prior high-frequency transistor studies, exemplifying the superior electronics potential of C-face epitaxial graphene. Careful transistor design using a high κ dielectric T-gate and self-aligned contacts further contributed to the record-breaking fmax.

A 0.8 THz

We demonstrate record ac performance (0.8 THz) for a silicon-germanium heterojunction bipolar transistor (SiGe HBT) operating at cryogenic temperatures. An extracted peak fMAX of 798 GHz (peak fT of 479 GHz) at 4.3 K was measured for a device with a BVCEO of 1.67 V. This scaled SiGe HBT also exhibits excellent thermal properties, as required from an electro-thermal reliability perspective. Taken together, these results strongly suggest that at the limits of scaling, robust, and manufacturable SiGe HBTs designed for room temperature operation are likely to achieve THz speeds.

f_{\rm MAX}

We study mixed-mode stress degradation in SiGe HBTs using a novel physical TCAD model in which the processes of hot carrier generation within the semiconductor, carrier propagation to the oxide interface, and formation of interface traps are directly modeled. Transient degradation simulations using a calibrated 2-D SiGe HBT model correlate well with measured data. With this novel simulation tool, we investigate the bias dependence and location of interface traps and show that secondary holes produced by impact ionization are the dominant carrier to damage the emitter-base (EB) spacer oxide interface, confirming previously reported results. We also compare in detail trap formation at the EB spacer and shallow-trench-isolation (STI) oxide interfaces as a function of time and stress condition. At the STI oxide interfaces, we find that hot electrons and holes each dominate trap formation in different regions, and the hot carriers that reach the STI predominately originate outside of the selectively implanted collector, revealing the important role played by dopant diffusion from the extrinsic base of quasi-self-aligned SiGe HBTs.

SiGe HBT Operating at 4.3 K

This paper presents the results of an investigation of the steady-state safe operating conditions for large-signal silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) circuits. By calculating capacitive currents within the intrinsic transistor, avalanche inducing currents through the transistor junctions are isolated and then compared with dc instability points established through simulation and measurement. In addition, calibrated technology computer-aided design simulations are used to provide further insight into the differences between RF and dc operation and stress conditions. The ability to swing the terminals of a SiGe HBT beyond the static I-V conditions coincident with catastrophic breakdown is explained. Furthermore, hot-carrier effects are also compared from multiple perspectives, with supporting data taken from fully realized X-band and C-band cascode driver amplifiers. This analysis provides microwave circuit designers with the framework necessary to better understand the full-voltage-swing potential of a given SiGe HBT technology and the resultant hot carrier damage under RF operation.

Predictive Physics-Based TCAD Modeling of the Mixed-Mode Degradation Mechanism in SiGe HBTs

SiGe BiCMOS technology is currently being used to develop electronics for space applications due to the excellent analog and RF performance of SiGe HBTs over an extremely wide range of temperatures, together with its built-in total dose radiation tolerance [1]. For instance, SiGe BiCMOS electronic components can operate directly in the extreme ambient environment found on the lunar surface, where temperatures cycle from -180 C to +125 C (a 300 C swing over 28 days) and radiation exposure exists (both total dose and single event effects). Operating electronic systems under ambient conditions, without excessive shielding or by providing heaters inside Warm Electronics Boxes (WEBs) to protect electronics from their surroundings (current practice), can save substantial size, weight, and power, increasing the reliability and decreasing the cost for these missions. To enable design of RF circuits that can operate over such an extremely wide temperature range, we clearly need to be able to model the small-signal RF performance of SiGe HBTs, and understand its variation with biasing current, voltage and temperature, particularly for the cryogenic temperatures that commercial applications do not cover. We present here small-signal modeling results of a first-generation SiGe HBT with a 50 GHz peak fT at 300 K, in the temperature range of 300 K to 93 K.

Large-Signal Reliability Analysis of SiGe HBT Cascode Driver Amplifiers

This paper presents an investigation of the impact of single-event transients (SETs) and total ionization dose (TID) on precision voltage reference circuits designed in a fourth-generation, 90-nm SiGe BiCMOS technology. A first-order uncompensated bandgap reference (BGR) circuit is used to benchmark the SET and TID responses of these voltage reference circuits (VRCs). Based on the first-order BGR radiation response, new circuit-level radiation-hardening-by-design (RHBD) techniques are proposed. An RHBD technique using inverse-mode (IM) transistors is demonstrated in a BGR circuit. In addition, a PIN diode VRC is presented as a potential SET and TID tolerant, circuit-level RHBD alternative.

Cryogenic RF Small-Signal Modeling and Parameter Extraction of SiGe HBTs

We characterize multilayer graphene grown on C-face SiC before and after exposure to a total ionizing dose of 12 Mrad(SiO2) using a 10 keV x-ray source. While we observe the partial peeling of the top graphene layers and the appearance of a modest Raman D-peak, we find that the electrical characteristics (mobility, sheet resistivity, free carrier concentration) of the material are mostly unaffected by radiation exposure. Combined with x-ray photoelectron spectroscopy data showing numerous carbon-oxygen bonds after irradiation, we conclude that the primary damage mechanism is through surface etching from reactive oxygen species created by the x-rays.

Single-Event Transient and Total Dose Response of Precision Voltage Reference Circuits Designed in a 90-nm SiGe BiCMOS Technology

The temperature sensitivity of drain-current variations in the subthreshold regime of MOSFET operation is analyzed through TCAD simulations and device measurements. Interface traps are determined to be the dominant factor in increasing the temperature sensitivity of drain-current differences in weak inversion. The variability caused by interface defects has significant implications on the reliability of MOSFET-based circuits intended for extreme-environment applications.

X-ray radiation effects in multilayer epitaxial graphene

The degradation of SiGe HBTs due to mixed-mode DC and RF stress (simultaneous application of high current and voltage) has been modeled for the first time. State-of-the-art 200 GHz SiGe HBTs were first characterized, and then DC and RF stressed. Using TCAD simulations and calculations based upon a reaction-diffusion model, the excess base current due to stress was modeled as a function of the stress current and voltage. This physics-based stress model was then designed as a sub-circuit in Cadence, and incorporated into a cascode SiGe PA design to predict the DC and RF stress-induced excess base current. Predicted degradation is in agreement with RF stress results.

Influence of Interface Traps on the Temperature Sensitivity of MOSFET Drain-Current Variations

This paper uses a physics-based TCAD degradation model to examine the accumulated stress damage of SiGe HBTs under pseudodynamic mixed-mode stress as a function of both electrical stress bias and temperature. The temperature dependence of mixed-mode stress damage is fully explored, beginning with impact-ionization calibration, and then by identifying and calibrating the dependence of scattering length and hydrogen diffusion parameters of the degradation model. After calibrating the model across electrical bias and temperature, the effectiveness and limitations of accumulated stress damage while varying electrical bias and while varying temperature are identified, and the implications of this aging model for circuit designers are discussed.