Atsushi Hatakeyama
Fujitsu
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Publication
Featured researches published by Atsushi Hatakeyama.
international solid-state circuits conference | 1997
Atsushi Hatakeyama; Hirohiko Mochizuki; Tadao Aikawa; Masato Takita; Yuki Ishii; Hironobu Tsuboi; Shinya Fujioka; Shusaku Yamaguchi; Makoto Koga; Yuji Serizawa; Koichi Nishimura; Kuninori Kawabata; Yoshinori Okajima; Michiari Kawano; Hideyuki Kojima; Kazuhiro Mizutani; Toru Anezaki; Masatomo Hasegawa; Masao Taguchi
This 256 Mb synchronous DRAM with 1 ns clock access is stable against temperature, voltage, and process variation by use of an innovative register-controlled delay locked loop (RDLL). Unlike most conventional high-density DRAMs, the bit-lines are placed above the storage capacitors in this DRAM to relax design rules of the core area. The noise issues are analyzed and resolved to help implement the technology in mass production of 0.28 to 0.24 /spl mu/m 200 MHz DRAMs.
Archive | 1994
Atsushi Hatakeyama; Fumio Baba; Junichi Kasai; Mitsutaka Sato
Archive | 1996
Shinya Fujioka; Atsushi Hatakeyama; Hirohiko Mochizuki
Archive | 1998
Yoshihiro Takemae; Masao Taguchi; Masao Nakano; Takaaki Suzuki; Hiroyoshi Tomita; Toshiya Uchida; Yasuharu Sato; Atsushi Hatakeyama; Masato Matsumiya; Yasurou Matsuzaki
Archive | 1997
Kuninori Kawabata; Atsushi Hatakeyama
Archive | 1997
Yoshihiro Takemae; Masao Taguchi; Yasurou Matsuzaki; Hiroyoshi Tomita; Hirohiko Mochizuki; Atsushi Hatakeyama; Yoshinori Okajima; Masao Nakano
Archive | 1991
Atsushi Hatakeyama; Masao Nakano
Archive | 2000
Kaoru Mori; Ayako Kitamoto; Masato Matsumiya; Masato Takita; Shinichi Yamada; Koichi Nishimura; Atsushi Hatakeyama
Archive | 1999
Atsushi Hatakeyama; Koichi Nishimura; 淳 畠山; 幸一 西村
Archive | 1997
Shusaku Yamaguchi; Atsushi Hatakeyama; Masato Takita; Tadao Aikawa; Hirohiko Mochizuki
