Tadao Aikawa
Fujitsu
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Publication
Featured researches published by Tadao Aikawa.
international solid-state circuits conference | 1997
Atsushi Hatakeyama; Hirohiko Mochizuki; Tadao Aikawa; Masato Takita; Yuki Ishii; Hironobu Tsuboi; Shinya Fujioka; Shusaku Yamaguchi; Makoto Koga; Yuji Serizawa; Koichi Nishimura; Kuninori Kawabata; Yoshinori Okajima; Michiari Kawano; Hideyuki Kojima; Kazuhiro Mizutani; Toru Anezaki; Masatomo Hasegawa; Masao Taguchi
This 256 Mb synchronous DRAM with 1 ns clock access is stable against temperature, voltage, and process variation by use of an innovative register-controlled delay locked loop (RDLL). Unlike most conventional high-density DRAMs, the bit-lines are placed above the storage capacitors in this DRAM to relax design rules of the core area. The noise issues are analyzed and resolved to help implement the technology in mass production of 0.28 to 0.24 /spl mu/m 200 MHz DRAMs.
Archive | 1999
Yasuharu Sato; Tadao Aikawa; Shinya Fujioka; Waichiro Fujieda; Hitoshi Ikeda; Hiroyuki Kobayashi
Archive | 2001
Tadao Aikawa
Archive | 1999
Shinya Fujioka; Masao C O Fujitsu Limited Taguchi; Yasuharu Sato; Takaaki Suzuki; Tadao Aikawa; Yasurou Matsuzaki; Toshiya Uchida
Archive | 2005
Yasurou Matsuzaki; Yasuharu Sato; Tadao Aikawa; Masafumi Yamazaki; Takaaki Suzuki
Archive | 2004
Hiroshi Miyake; Noriyuki Tokuhiro; Tadao Aikawa; Hiroshi Miyazaki
Archive | 1997
Waichirou Fujieda; Shinya Fujioka; Tadao Aikawa
Archive | 1999
Tadao Aikawa; Yasuharu Sato; Hiroyuki Kobayashi; Waichirou Fujieda
Archive | 1997
Yoshihiro Takemae; Masao Taguchi; Masao Nakano; Hirohiko Mochizuki; Hiroyoshi Tomita; Yasurou Matsuzaki; Tadao Aikawa
Archive | 2003
Tadao Aikawa
