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Dive into the research topics where Axel Buerke is active.

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Featured researches published by Axel Buerke.


international electron devices meeting | 2008

6F 2 buried wordline DRAM cell for 40nm and beyond

T. Schloesser; F. Jakubowski; J. v. Kluge; Andrew Graham; S. Slesazeck; M. Popp; P. Baars; K. Muemmler; P. Moll; K. Wilson; Axel Buerke; D. Koehler; J. Radecker; E. Erben; U. Zimmermann; T. Vorrath; B. Fischer; G. Aichmayr; R. Agaiby; W. Pamler; T. Schuster; W. Bergner; W. Mueller

We present a 46 nm 6F2 buried word-line (bWL) DRAM technology, enabling the smallest cell size of 0.013 mum2 published to date. The TiN/ W buried word-line is built below the Si surface, forming a low resistive interconnect and the metal gate of the array transistors. We demonstrate high array device on-current, small parameter variability, high reliability and small parasitic capacitances, resulting in an excellent array performance. The array device can be scaled down to 30 nm without compromising its performance.


international electron devices meeting | 2008

Carbon-based resistive memory

Franz Kreupl; Rainer Bruchhaus; Petra Majewski; Jan Boris Philipp; Ralf Symanczyk; Thomas Happ; Christian Arndt; Mirko Vogt; Roy Zimmermann; Axel Buerke; Andrew Graham; Michael Kund

We propose carbon as new resistive memory material for non-volatile memories and compare three allotropes of carbon, namely carbon nanotubes, graphene-like conductive carbon and insulating carbon for their possible application as resistance-change material in high density non-volatile memories. Repetitive high-speed switching and the potential for multi-level programming have been successfully demonstrated.


Archive | 2007

Fabrication method for an integrated circuit structure

Clemens Fitz; Axel Buerke; Jens Hahn; Frank Jakubowski; Tobias Mono; Joern Regul; Sven Schmidbauer


Microelectronic Engineering | 2008

Interface optimization for poly silicon/tungsten gates

Sven Schmidbauer; Jens Hahn; Axel Buerke; Frank Jakubowski; Olaf Storbeck; Yu-Wei Ting; Thomas Schuster; Jürgen Faul


Archive | 2005

Gate structure for a transistor and method for fabricating the gate structure

Jens Hahn; Sven Schmidbauer; Axel Buerke


Archive | 2008

Herstellungsverfahren für eine Transistor-Gatestruktur

Clemens Fitz; Axel Buerke; Jens Hahn; Frank Jakubowski; Tobias Mono; Joern Regul; Sven Schmidbauer


Archive | 2006

Herstellungsverfahren für eine Transistor-Gatestruktur Manufacturing method of a transistor gate structure

Axel Buerke; Clemens Fitz; Jens Hahn; Frank Jakubowski; Tobias Mono; Joern Regul; Sven Schmidbauer


Archive | 2005

Verfahren zum Steuern einer Dicke einer ersten Schicht und Verfahren zum Anpassen der Dicke unterschiedlicher erster Schichten A method of controlling a thickness of a first layer and method for adjusting the thickness of different first layers

Axel Buerke; Chiang-Hung Lin; James Lo; Sven Schmidbauer


Archive | 2004

Verfahren zur Herstellung einer Gate-Struktur und Gate-Struktur für einen Transistor A process for producing a gate structure and the gate structure for a transistor

Axel Buerke; Jens Hahn; Sven Schmidbauer


Archive | 2000

Verfahren zur Herstellung einer Verdrahtung für Kontaktlöcher A process for producing a wiring for contact holes

Axel Buerke; Sven Schmidbauer; Jens Hahn

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