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Dive into the research topics where B. Vandelle is active.

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Featured researches published by B. Vandelle.


bipolar/bicmos circuits and technology meeting | 2008

0.13μm SiGe BiCMOS technology for mm-wave applications

G. Avenier; Pascal Chevalier; Germaine Troillard; B. Vandelle; F. Brossard; Linda Depoyan; M. Buczko; S. Boret; S. Montusclat; A. Margain; S. Pruvost; Sean T. Nicolson; Kenneth H. K. Yau; Daniel Gloria; Didier Dutartre; Sorin P. Voinigescu; A. Chantre

This paper presents a complete 0.13 mum SiGe BiCMOS technology fully dedicated to millimeter-wave applications, including a high-speed (230/280GHz fT/fMAX) and medium voltage SiGe HBT, thick-copper back-end designed for high performance transmission lines and inductors, 2fF/mum2 high-linearity MIM capacitor and complementary double gate oxide MOS transistors.


bipolar/bicmos circuits and technology meeting | 2005

300 GHz f/sub max/ self-aligned SiGeC HBT optimized towards CMOS compatiblity

Pascal Chevalier; B. Barbalat; Laurent Rubaldo; B. Vandelle; Didier Dutartre; P. Bouillon; T. Jagueneau; C. Richard; Fabienne Saguin; A. Margain; A. Chantre

This paper summarizes the work carried out to improve performances of a SiGeC HBT featuring a selective epitaxial base and an arsenic-doped monocrystalline emitter. A 300 GHz f/sub max/ is reported for a transistor sustaining high thermal budget.


bipolar/bicmos circuits and technology meeting | 2005

A self-aligned vertical HBT for thin SOI SiGeC BiCMOS

G. Avenier; Thierry Schwartzmann; Pascal Chevalier; B. Vandelle; Laurent Rubaldo; Didier Dutartre; L. Boissonnet; Fabienne Saguin; R. Pantel; Sébastien Fregonese; Cristell Maneux; Thomas Zimmer; A. Chantre

We demonstrate a 4-mask HBT module, which enables the integration of three high performance self-aligned SiGeC HBTs into a 0.13/spl mu/m SOI CMOS technology. Static and dynamic transistor characteristics are described and compared with simulation results and bulk device performances.


bipolar/bicmos circuits and technology meeting | 2008

SiGe HBTs featuring f T ≫400GHz at room temperature

B. Geynet; Pascal Chevalier; B. Vandelle; F. Brossard; Nicolas Zerounian; M. Buczko; Daniel Gloria; F. Aniel; G. Dambrine; F. Danneville; Didier Dutartre; A. Chantre

This paper presents the results of investigations on process thermal budget reduction in order to increase the operation frequency of SiGe HBTs. We describe the variations of DC and AC characteristics of the devices with the spike annealing temperature. Record peak fT values of 410 GHz and 640 GHz are reported at room and cryogenic temperatures respectively.


european solid state device research conference | 2005

Investigation of fully- and partially-depleted self-aligned SiGeC HBTs on thin film SOI

G. Avenier; Pascal Chevalier; B. Vandelle; Damien Lenoble; Fabienne Saguin; Sebastien Fregonese; Thomas Zimmer; Alain Chantre

This paper presents a comprehensive experimental study of the static and dynamic characteristics of self-aligned vertical SiGeC HBTs fabricated on CMOS compatible, thin film SOI substrates. In particular, the influence of collector doping and layout on the performance of fully-depleted transistors is described in details. The potentiality of partially-depleted SOI HBTs for high speed applications is also demonstrated, with cut-off frequencies f/sub T/= 102GHz and f/sub MAX/= 154GHz reported here for the first time.


bipolar/bicmos circuits and technology meeting | 2006

250-GHz self-aligned Si/SiGeC HBT featuring an all-implanted collector

Pascal Chevalier; C. Raya; B. Geynet; Franck Pourchon; F. Judong; Fabienne Saguin; Thierry Schwartzmann; R. Pantel; B. Vandelle; Laurent Rubaldo; G. Avenier; B. Barbalat; A. Chantre

This paper presents investigations led to simplify the collector module of SiGeC HBTs in order to reduce technology cost. Outcome of this work is an HBT featuring an all-implanted collector with record fT and fmax (>250 GHz)


european solid state device research conference | 2005

Deep trench isolation effect on self-heating and RF performances of SiGeC HBTs

B. Barbalat; Thierry Schwartzmann; Pascal Chevalier; T. Jagueneau; B. Vandelle; Laurent Rubaldo; Fabienne Saguin; N. Zerounian; F. Aniel; Alain Chantre

This paper focuses on the effect of deep trench isolation (DTI) on self-heating and electrical performances of state-of-the-art SiGeC heterojunction bipolar transistors (HBTs). The influence of DTI on the heat dissipation and on the thermal resistance of HBTs is studied both with electrical measurements and simulations. The results show that the DTI has a significant influence on heat dissipation and on the thermal resistance values but only little impact on RF performances.


international sige technology and device meeting | 2006

SiGe HBT design for CMOS compatible SOI

A. Chantre; G. Avenier; Pascal Chevalier; B. Vandelle; Fabienne Saguin; Cristell Maneux; Didier Dutartre; Thomas Zimmer

In this paper, we review the process and layout optimization of thin-film (150nm) SOI SiGe HBTs covering a wide range of f<sub>T</sub>-BV<sub>ceo</sub> tradeoffs, i.e. from ~150GHz f<sub>T</sub> to ~8V BV<sub>ceo</sub>. We have shown that a SiGe HBT with bulk-like f<sub>T</sub>-BV<sub>ceo</sub> trade-off can be built on a CMOS compatible SOI substrate. This HBT can be modularly integrated at low cost (4 masks, < 30 steps) in a 0.13 mum SOI CMOS process (Boissonnet et al.). Anticipated applications range from wireless to high-speed analog circuitry


bipolar/bicmos circuits and technology meeting | 2007

Development of a self-aligned pnp HBT for a complementary thin-SOI SiGeC BiCMOS technology

J. Duvernay; F. Brossard; G. Borot; L. Boissonnet; B. Vandelle; Laurent Rubaldo; F. Deleglise; G. Avenier; Pascal Chevalier; B. Rauber; Didier Dutartre; A. Chantre

This paper describes the development of a thin-SOI pnp SiGeC HBT using a self-aligned selective epitaxy emitter/base architecture. Static and dynamic device characteristics are presented, and first results from a full 130 nm thin-SOI complementary SiGeC BiCMOS technology are reported.


device research conference | 2008

Si/SiGe HBTs for Millimeter-wave BiCMOS Technologies

Pascal Chevalier; B. Geynet; B. Vandelle; F. Brossard; F. Pourchon; G. Avenier; Daniel Gloria; Didier Dutartre; S. Lepilliet; G. Dambrine; N. Zerounian; Kenneth H. K. Yau; E. Laskin; Sean T. Nicolson; Sorin P. Voinigescu; A. Chantre

In this paper we review a bit more than 10 years of SiGe BiCMOS technology development and present the best results published to date by the main contenders in the field. Next, with the support of recent results obtained at STMicroelectronics, we discuss the process optimization that led to further increase in the device operating speed. Finally, we present the characteristics of a 260GHz fT, 340GHz fmax SiGe HBT technology along with recent circuit results demonstrated in this technology.

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F. Aniel

University of Paris-Sud

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