Fabienne Saguin

230-GHz self-aligned SiGeC HBT for optical and millimeter-wave applications

This paper describes a 230-GHz self-aligned SiGeC heterojunction bipolar transistor developed for a 90-nm BiCMOS technology. The technical choices such as the selective epitaxial growth of the base and the use of an arsenic-doped monocrystalline emitter are presented and discussed with respect to BiCMOS performance objectives and integration constraints. DC and high-frequency device performances at room and cryogenic temperatures are given. HICUM model agreement with the measurements is also discussed. Finally, building blocks with state-of-the-art performances for a CMOS compatible technology are presented: A ring oscillator with a minimum stage delay of 4.4 ps and a 40-GHz low-noise amplifier with a noise figure of 3.9 dB and an associated gain of 9.2 dB were fabricated.

230 GHz self-aligned SiGeC HBT for 90 nm BiCMOS technology

This paper describes a 230 GHz self-aligned SiGeC HBT featuring a selective epitaxial base and an arsenic-doped monocrystalline emitter. These technical choices are presented and discussed with respect to BiCMOS performance objectives and integration constraints.

300 GHz f/sub max/ self-aligned SiGeC HBT optimized towards CMOS compatiblity

This paper summarizes the work carried out to improve performances of a SiGeC HBT featuring a selective epitaxial base and an arsenic-doped monocrystalline emitter. A 300 GHz f/sub max/ is reported for a transistor sustaining high thermal budget.

A self-aligned vertical HBT for thin SOI SiGeC BiCMOS

We demonstrate a 4-mask HBT module, which enables the integration of three high performance self-aligned SiGeC HBTs into a 0.13/spl mu/m SOI CMOS technology. Static and dynamic transistor characteristics are described and compared with simulation results and bulk device performances.

Investigation of fully- and partially-depleted self-aligned SiGeC HBTs on thin film SOI

This paper presents a comprehensive experimental study of the static and dynamic characteristics of self-aligned vertical SiGeC HBTs fabricated on CMOS compatible, thin film SOI substrates. In particular, the influence of collector doping and layout on the performance of fully-depleted transistors is described in details. The potentiality of partially-depleted SOI HBTs for high speed applications is also demonstrated, with cut-off frequencies f/sub T/= 102GHz and f/sub MAX/= 154GHz reported here for the first time.

Electrical Behavior and Technology Optimization of Si/SiGeC HBTs on Thin-Film SOI

A growing interest has been focused on silicon on insulator (SOI) technologies over the past years. Yet, few studies were carried out regarding the integration of vertical SiGe heterojunction bipolar transistors (HBTs) using such substrates. This paper deals both with the integration of a SiGeC HBT on thin-film CMOS-compatible SOI, and a comprehensive study of its electrical behavior based on physical simulation and electrical characterization. Various aspects of the optimization of device performances are described, considering process or layout improvements.

An investigation of the static and dynamic characteristics of high speed SiGe:C HBTs using a poly-SiGe emitter

We describe the fabrication and characterization of high speed SiGe:C HBTs using a poly-SiGe emitter. The effects of Ge incorporation into the emitter on the static (gain, BV/sub CEO/) and dynamic (f/sub T/, /spl tau//sub ECO/) device characteristics are analyzed. This experiment is used to quantify the impact of the current gain on f/sub T/, and provides an original way to extract the emitter component of the forward transit time.

250-GHz self-aligned Si/SiGeC HBT featuring an all-implanted collector

This paper presents investigations led to simplify the collector module of SiGeC HBTs in order to reduce technology cost. Outcome of this work is an HBT featuring an all-implanted collector with record fT and fmax (>250 GHz)

Deep trench isolation effect on self-heating and RF performances of SiGeC HBTs

This paper focuses on the effect of deep trench isolation (DTI) on self-heating and electrical performances of state-of-the-art SiGeC heterojunction bipolar transistors (HBTs). The influence of DTI on the heat dissipation and on the thermal resistance of HBTs is studied both with electrical measurements and simulations. The results show that the DTI has a significant influence on heat dissipation and on the thermal resistance values but only little impact on RF performances.

SiGe HBT design for CMOS compatible SOI

In this paper, we review the process and layout optimization of thin-film (150nm) SOI SiGe HBTs covering a wide range of f_T-BV_ceo tradeoffs, i.e. from ~150GHz f_T to ~8V BV_ceo. We have shown that a SiGe HBT with bulk-like f_T-BV_ceo trade-off can be built on a CMOS compatible SOI substrate. This HBT can be modularly integrated at low cost (4 masks, < 30 steps) in a 0.13 mum SOI CMOS process (Boissonnet et al.). Anticipated applications range from wireless to high-speed analog circuitry