G. Avenier

0.13

This paper presents a complete 0.13 μm SiGe BiCMOS technology fully dedicated to millimeter-wave applications, including a high-speed (230/280 GHz fT/fMAX) and medium voltage SiGe HBT, thick-copper back-end designed for high performance transmission lines and inductors, 2 fF/μm2 high-linearity MIM capacitor and complementary double gate oxide MOS transistors. Details are given on HBT integration, reliability and models as well as on back-end devices models.

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This paper summarizes the work carried out to improve performances of a conventional double-polysilicon FSA-SEG SiGe:C HBT towards 400 GHz f<inf>MAX</inf>. The technological optimization strategy is discussed and electrical characteristics are presented. A record peak f<inf>MAX</inf> of 423 GHz (f<inf>T</inf> = 273 GHz) is demonstrated in SiGe:C HBT technology.

m SiGe BiCMOS Technology Fully Dedicated to mm-Wave Applications

This paper presents a complete 0.13 mum SiGe BiCMOS technology fully dedicated to millimeter-wave applications, including a high-speed (230/280GHz fT/fMAX) and medium voltage SiGe HBT, thick-copper back-end designed for high performance transmission lines and inductors, 2fF/mum2 high-linearity MIM capacitor and complementary double gate oxide MOS transistors.

A conventional double-polysilicon FSA-SEG Si/SiGe:C HBT reaching 400 GHz f MAX

We demonstrate a 4-mask HBT module, which enables the integration of three high performance self-aligned SiGeC HBTs into a 0.13/spl mu/m SOI CMOS technology. Static and dynamic transistor characteristics are described and compared with simulation results and bulk device performances.

0.13μm SiGe BiCMOS technology for mm-wave applications

This paper presents a comprehensive experimental study of the static and dynamic characteristics of self-aligned vertical SiGeC HBTs fabricated on CMOS compatible, thin film SOI substrates. In particular, the influence of collector doping and layout on the performance of fully-depleted transistors is described in details. The potentiality of partially-depleted SOI HBTs for high speed applications is also demonstrated, with cut-off frequencies f/sub T/= 102GHz and f/sub MAX/= 154GHz reported here for the first time.

A self-aligned vertical HBT for thin SOI SiGeC BiCMOS

A growing interest has been focused on silicon on insulator (SOI) technologies over the past years. Yet, few studies were carried out regarding the integration of vertical SiGe heterojunction bipolar transistors (HBTs) using such substrates. This paper deals both with the integration of a SiGeC HBT on thin-film CMOS-compatible SOI, and a comprehensive study of its electrical behavior based on physical simulation and electrical characterization. Various aspects of the optimization of device performances are described, considering process or layout improvements.

Investigation of fully- and partially-depleted self-aligned SiGeC HBTs on thin film SOI

This paper presents investigations led to simplify the collector module of SiGeC HBTs in order to reduce technology cost. Outcome of this work is an HBT featuring an all-implanted collector with record fT and fmax (>250 GHz)

Electrical Behavior and Technology Optimization of Si/SiGeC HBTs on Thin-Film SOI

In this paper, we review the process and layout optimization of thin-film (150nm) SOI SiGe HBTs covering a wide range of f_T-BV_ceo tradeoffs, i.e. from ~150GHz f_T to ~8V BV_ceo. We have shown that a SiGe HBT with bulk-like f_T-BV_ceo trade-off can be built on a CMOS compatible SOI substrate. This HBT can be modularly integrated at low cost (4 masks, < 30 steps) in a 0.13 mum SOI CMOS process (Boissonnet et al.). Anticipated applications range from wireless to high-speed analog circuitry

250-GHz self-aligned Si/SiGeC HBT featuring an all-implanted collector

We investigate radiation-induced effects on the DC, AC and thermal characteristics of high-performance SiGe HBTs fabricated on thin-film SOI. TCAD simulations indicate novel heavy-ion charge collection phenomena resulting from the unique CBEBC device layout of this technology platform.

SiGe HBT design for CMOS compatible SOI

This paper describes the development of a thin-SOI pnp SiGeC HBT using a self-aligned selective epitaxy emitter/base architecture. Static and dynamic device characteristics are presented, and first results from a full 130 nm thin-SOI complementary SiGeC BiCMOS technology are reported.