Beom-Yong Kim

Novel 3-dimensional Dual Control-gate with Surrounding Floating-gate (DC-SF) NAND flash cell for 1Tb file storage application

A novel 3-dimensional Dual Control-gate with Surrounding Floating-gate (DC-SF) NAND flash cell has been successfully developed, for the first time. The DC-SF cell consists of a surrounding floating gate with stacked dual control gate. With this structure, high coupling ratio, low voltage cell operation (program: 15V and erase: −11V), and wide P/E window (9.2V) can be obtained. Moreover, negligible FG-FG interference (12mV/V) is achieved due to the control gate shield effect. Then we propose 3D DC-SF NAND flash cell as the most promising candidate for 1Tb and beyond with stacked multi bit FG cell (2 ∼ 4bit/cell).

Low Power and Improved Switching Properties of Selector-Less Ta2O5 Based Resistive Random Access Memory Using Ti-Rich TiN Electrode

The effects of TiN top electrode composition (TiN vs Ti-rich TiN) on the resistive switching characteristics of selector-less TiN/TiOx/Ta2O5/TiN resistive random access memory (ReRAM) are investigated. Ti-rich TiN enables TiOx to have a higher concentration of oxygen vacancy and reduce barrier height between top electrode and TiOx. This leads to higher on/off current ratio and lower operation voltage without degradation of non-linearity which is the important factor for selector-less type ReRAM, compared to the stoichiometric TiN resistor stack. Consequently, it is verified that the switching mechanism is hybrid combination of filament formation and redox reaction in switching operation. This work is applicable to both high density and cost-effective ReRAM.

The study of flat-band voltage shift using arsenic ion-implantation with High-k/Metal Inserted Poly Si gate stacks

The origin of flat band voltage shift phenomena using arsenic ion-implant in High-k/Metal Inserted Poly Si (HK/MIPS) gate stacks was investigated. Arsenic ion-implantations were carried out on HfSiO and HfSiON dielectric layers. Precise arsenic profile was obtained through front and backside SIMS analysis. From the electrical and physical analysis, we verified that the flat band voltage was shifted due to an arsenic dipole formation at high-k/metal interface. The negative shift of 480mV was obtained with the optimized arsenic ion implant condition.