Brian Cunningham

Heteroepitaxial growth of Ge on (100) Si by ultrahigh vacuum, chemical vapor deposition

The heteroepitaxial growth of pure Ge films on (100) Si by an ultrahigh vacuum, chemical vapor deposition technique is reported for the first time. The growth mode is found to be critically dependent on the substrate temperature during deposition. Two temperature regimes for growth are observed. Between 300 and 375 °C, growth occurs in a two‐dimensional, layer‐by‐layer mode, with an activation energy of 1.46 eV. Above 375 °C, island formation is observed. In the low‐temperature regime the growth rate is controlled by a surface decomposition reaction, whereas in the high‐temperature regime the growth rate is controlled by diffusion and adsorption from the gas phase.

Effects of Peierls barrier and epithreading dislocation orientation on the critical thickness in heteroepitaxial structures

We have extended the mechanical equilibrium theory of J. W. Matthews and A. E. Blakeslee [J. Cryst. Growth 27, 118 (1974)] (MB) for determining the critical thickness in semiconducting heteroepitaxial films by including the effect of the Peierls barrier. The new formulation allows an evaluation of the dependence of critical thickness on the orientation of epithreading dislocation, and a comparison of theoretical predictions with measurements indicates that a knowledge of the epithreading dislocation orientation is necessary in predicting critical thicknesses in heteroepitaxial structures. In this formulation, the effect of the Peierls barrier is to bring the theoretical critical thicknesses closer to experimental values as compared to the predictions of the MB theory.

Thin film interactions of Al and Al(Cu) on TiW

Thin‐film reactions of Al/Ti22W78 (∼10 wt. % Ti) with and without ∼2 at. % Cu in the Al were investigated by transmission electron microscopy for vacuum annealing in the temperature range 300–600 °C. The reactions are nonuniform and the presence of Cu has little effect on the reaction kinetics. Reactions are grain boundary dominated and start at 400 °C with the formation of WAl12.

Characterization of polycrystalline silicon–single‐crystal silicon interfaces and correlation to bipolar transistor device data

Depth‐resolved secondary‐ion mass spectrometry (SIMS) and high‐resolution transmission electron microscopy were used to study the composition and structure of the arsenic‐doped polycrystalline silicon (polysilicon)–single‐crystal silicon interface. This interface remains intact during an 880 °C anneal, with no alignment of the polysilicon occurring. When the interfacial oxide varies from a thin, discontinuous film, to a continuous layer, SIMS analysis is able to quantify differences in the interfacial oxygen content. This interfacial oxygen, expressed as oxygen atoms/cm2, is found to correlate to polysilicon emitter bipolar transistor device current gain.

Diffusion barrier properties of TiN films for submicron silicon bipolar technologies

We have studied the properties of reactively sputtered TiN films used as diffusion barriers for Al‐Cu metallization in submicron bipolar transistors. Emitter‐base diodes with shallow junctions were fabricated to monitor the integrity of the barrier via junction leakage measurements. Scanning and transmission electron microscopy were used to study the morphology and step coverage of these films, and also for barrier failure analysis. The effectiveness of the barrier depends on both the nominal thickness of the TiN layer and on the device dimensions. For thin TiN layers (∼47 nm), high junction leakage was observed on narrow emitters (0.5 μm) but not on wide emitters (5 μm). These observations highlight the reliability and yield concerns associated with the use of sputtered TiN films for deep submicron technologies. In some cases, low‐temperature (500 °C) epitaxial alignment of the emitter polysilicon was observed, associated with Al penetration of the barrier. This indicates that the Al provides an enhancem...

Reaction of Ti with WSi2

Reactions between Ti and WSi2 have been studied between 400 and 800 °C. Reactions at the Ti–WSi2 interface begin at 600 °C, with the formation of TiSi. The TiSi is converted to TiSi2 at 800 °C. The formation temperatures for TiSi and TiSi2 are higher than those observed for Ti on Si, presumably because the Si supply is limited by relatively slow diffusion of Si through WSi2. At 700 °C, localized formation of Ti silicide is also observed below the WSi2, due to Ti diffusion through grain boundaries in the WSi2. These results suggest that post-metallization anneals of Ti on WSi2 polycide structures should be kept below 700 °C to avoid device degradation.

Platinum silicide contact to arsenic‐doped polycrystalline silicon

PtSi contacts to As‐doped polycrystalline silicon have been studied with respect to dopant redistribution, microstructure, and contact resistance. Arsenic was found to pileup at the PtSi‐polysilicon interface upon silicide formation. Cross‐sectional transmission‐electron microscopy revealed columnar PtSi grains and a relatively flat interface between PtSi and polysilicon. These observations are similar to those reported for the case of PtSi formed on the single‐crystal silicon. The specific contact resistance (ρc) has been investigated as a function of As concentration ranging from 8×1019 to 2×1021 cm−3 and of its dependence on substrate preclean procedures prior to Pt deposition. It was found that ρc decreases with increasing As concentration, as expected from theory. However, the contact resistance to As‐doped polysilicon is about ten times higher than contacts to similarly doped single‐crystal Si. The origin of this difference is attributed to the fact that not all of the implanted As was activated. Ha...

Microstructural effects of emitter size on polysilicon‐emitter bipolar transistors

As the dimensions of semiconductor devices are reduced, changes in the structure of the devices can have a pronounced effect on their electrical parameters. In some cases it may no longer be correct to assume that the electrical parameters can simply be scaled with device area. In the present study it will be shown that when polysilicon‐emitter bipolar transistors are reduced to submicron dimensions, shadowing of the ion implant into the emitter sidewalls can alter the dopant concentration in the polysilicon diffusion source, thereby changing the dopant profiles in the single‐crystal silicon, and hence the junction depths. This shadowing effect, although present in all devices, is only found to affect the electrical parameters of transistors when the emitter size approaches submicron dimensions.