C.R. Viswanathan

Flicker noise in CMOS transistors from subthreshold to strong inversion at various temperatures

Flicker noise is the dominant noise source in silicon MOSFETs. Even though considerable amount of work has been done in investigating the noise mechanism, controversy still exists as to the noise origin. In this paper, a systematic study of flicker noise in CMOS transistors from twelve different fabricators is reported under various bias conditions corresponding to the gate voltage changing from subthreshold to strong inversion, and the drain voltage changing from linear to saturation regions of operation. The measurement temperature was varied from room temperature down to 5 K. Experimental results consistently suggest that 1/f noise in n-channel devices is dominated by carrier-density fluctuation while in p-channel devices the noise is mainly due to mobility fluctuation. >

Low flicker-noise GaN/AlGaN heterostructure field-effect transistors for microwave communications

We report a detailed investigation of flicker noise in novel GaN/AlGaN heterostructure field-effect transistors (GaN HFET). Low values of 1/f noise found in these devices (i.e., the Hooge parameter is on the order of 10/sup -1/) open up the possibility for applications in communication systems. We have examined the scaling of the noise spectral density with the device dimensions in order to optimize their performance. It was also found that the slope /spl gamma/ of the 1/f/sup /spl gamma// noise density spectrum is in the 1.0-1.3 range for all devices and decreases with the decreasing (i.e., more negative) gate bias. The results are important for low-noise electronic technologies requiring a low phase-noise level.

Low-temperature mobility measurements on CMOS devices

The surface channel mobility of carriers in n- and p-MOS transistors fabricated in a CMOS process was accurately determined at low temperatures down to 5 K. The mobility was obtained by an accurate measurement of the inversion charge density using a split C-V technique and the conductance at low drain voltages. The split C-V technique was validated at all temperatures using a one-dimensional Poisson solver (MOSCAP) which was modified for low-temperature application. The mobility dependence on the perpendicular electric field for different substrate bias values appeared to have different temperature dependences for n- and p-channel devices. The electron mobility increased with a decrease in temperature at all gate voltages. On the other hand, the hole mobility exhibited a different temperature behavior depending upon whether the gate voltage corresponded to strong inversion or was near threshold. >

Mobility-field behavior of fully depleted SOI MOSFET's

This work reports measured effective mobility vs. effective vertical electric field and the accompanying experimental method of extraction for the fully depleted (FD) SOI MOSFET. The effective channel mobility vs. effective vertical electric field behavior was investigated as a function of the SOI film doping concentration, the SOI back-gate bias, and the SOI film thickness. The validity of using the approximation, Q/sub i/=C/sub ox/(V/sub GS//spl minus/V/sub TH/), for the inversion charge density in FD SOI is examined and experimentally confirmed.<<ETX>>

Flicker noise in GaN/Al/sub 0.15/Ga/sub 0.85/N doped channel heterostructure field effect transistors

We have investigated noise characteristics of novel GaN/Al/sub 0.15/Ga/sub 0.85/N doped channel heterostructure field effect transistors designed for high-power density applications. The measurements were carried out for various gate bias voltages V/sub GS/ and with the drain voltage V/sub DS/ varying from the linear to the saturation regions of operation V/sub DS/>5 V. Our results show that flicker, e.g., 1/f noise, is the dominant limiting noise of these devices; and the Hooge parameter is of the order of 10/sup -5/-10/sup -4/. The gate voltage dependence of 1/f noise was observed in the linear region for all examined V/sub GS/ and in the saturation region for V/sub GS/>0. These results indicating low values of the Hooge parameter are important for microwave applications.

Device scaling effects on hot-carrier induced interface and oxide-trapped charge distributions in MOSFETs

The influence of channel length and oxide thickness on the hot-carrier induced interface (N/sub it/) and oxide (N/sub ot/) trap profiles is studied in n-channel LDD MOSFETs using a novel charge pumping (CP) technique. The technique directly provides separate N/sub it/ and N/sub ot/ profiles without using simulation, iteration or neutralization, and has better immunity from measurement noise by avoiding numerical differentiation of data. The N/sub it/ and N/sub ot/ profiles obtained under a variety of stress conditions show well-defined trends with the variation in device dimensions. The N/sub it/ generation has been found to be the dominant damage mode for devices having thinner oxides and shorter channel lengths. Both the peak and spread of the N/sub it/ profiles have been found to affect the transconductance degradation, observed over different channel lengths and oxide thicknesses. Results are presented which provide useful insight into the effect of device scaling on the hot-carrier degradation process.

A comprehensive study of hot-carrier induced interface and oxide trap distributions in MOSFETs using a novel charge pumping technique

A novel simulation-independent charge pumping (CP) technique is employed to accurately determine the spatial distributions of interface (N/sub it/) and oxide (N/sub 0t/) traps in hot-carrier stressed MOSFETs. Direct separation of N/sub it/ and N/sub 0t/ is achieved without using simulation, iteration, or neutralization. Better immunity from measurement noise is achieved by avoiding numerical differentiation of data. The technique is employed to study the temporal buildup of damage profiles for a variety of stress conditions. The nature of the generated damage and trends in its position are qualitatively estimated from the internal electric field distributions obtained from device simulations. The damage distributions are related to the drain current degradation and well-defined trends are observed with the variations in stress biases and stress time. Results are presented which provide fresh insight into the hot-carrier degradation mechanisms.

Plasma-damaged oxide reliability study correlating both hot-carrier injection and time-dependent dielectric breakdown

The oxide damage resulting from exposure to a plasma environment in four different dry-etch tools was investigated using both hot-carrier injection (HCI) and time-dependent dielectric breakdown (TDDB). A strong correlation was observed between hot-carrier injection results and time-dependent dielectric breakdown results. It was found that a damaged oxide has both a lower critical energy for HCI to create an interface trap, and a lower activation energy for Fowler-Nordheim injection to create a hole in the oxide. These results also suggest that in dry etching, possibly more damage occurs in the metal step than in the contact etch step.<<ETX>>

Effect of channel doping on the low-frequency noise in GaN/AlGaN heterostructure field-effect transistors

We examined low-frequency noise in doped and undoped channel GaN/AlGaN/SiC heterostructure field-effect transistors with different Al content in the barrier. The observed noise spectra follow the 1/fγ law with 0.8⩽γ⩽1.2 for frequencies f up to 100 kHz. Our results indicate two orders of magnitude reduction in the input-referred noise spectral density in the undoped channel devices with respect to the noise density in the doped channel devices of comparable electric characteristics. Low temperature measurements reveal generation—recombination-type peaks in the spectra of the doped channel devices. Effects of the piezoelectric charges at the GaN/AlGaN interface are also discussed.

Threshold voltage in short-channel MOS devices

The threshold voltage in short-channel MOS transistors was investigated by use of a two-dimensional numerical solution of Poissons equation and experimental measurements on devices of 5.15-, 3.15-, and 2.15-µm channel length. The assumption of constant equipotential surface in the oxide implicit in the charge-sharing technique is not valid in devices of shorter Channel lengths and at larger operating voltages. The numerical determination of the threshold voltage from the two-dimensional analysis agrees with experimental results. Unlike previous work, the charge-sharing model was investigated from an electric-field point of view. The inadequacies of the charge-sharing model are elucidated qualitatively and quantitatively.