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Dive into the research topics where Catherine Mallardeau is active.

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Featured researches published by Catherine Mallardeau.


Materials Science and Engineering B-advanced Functional Solid-state Materials | 1989

Effect of sputter-etching conditions on the barrier characteristics and the process-induced defects in (Ti-W)/Si Schottky diodes

D. Bauza; Catherine Mallardeau; Yves Morand

Abstract The effects of argon sputter-etching conditions on the characteristics of (Ti-W)/Si (n-type) Schottky diodes have been studied. The etching rate ranged from 8 to 50 A min −1 and the time was adjusted so that a layer of 50–75 A was removed. The diode characteristics were determined by current-voltage and capacitance-voltage measurements, while deep-level transient spectroscopy was used to characterize the sputter-induced defects and to investigate theor dependence on backsputter-etching parameters. It was found that the barrier height of the devices strongly depends on the etching rate and time. Its value was maximum (about 0.6 V) for a sputter-etching rate near 20 A min −1 . Also several electron traps were measured in the upper half of the band gap. A trap situated at 0.36 eV from the conduction band edge was found in all the samples studied. The depth profiles of these traps were recorded. Theor concentrations varied by a factor of the order of 5 and depended on the etching conditions.


european solid state device research conference | 1989

Electrical Properties and Sputter-etched Induced Defects in Ti-W/Si Schottky Diodes

D. Bauza; Catherine Mallardeau; Yves Morand

Ti-W/Si (n type) Schottky diodecs which have been back-sputter etched prior to metal deposition are studied. It is found that the barrier height strongly depends on the etching conditions. Defects levels are measured usinig DLTS. Their characteristics are studied as function of the etching conditions.


Archive | 2002

DRAM cell with high integration density, and associated method

T. Skotnicki; S. Monfray; Catherine Mallardeau


Archive | 2000

Method for making a stack of capacitors, in particular for dynamic random access memory [DRAM]

T. Skotnicki; Malgorzata Jurczak; Catherine Mallardeau


Archive | 2001

Integrated circuit including active components and at least one passive component associated fabrication method

Catherine Mallardeau; Pascale Mazoyer; Marc Piazza


european solid state device research conference | 1994

Suppression of the Vt Roll-Up Effect in Sub-Micron NMOST

Alex Kalnitsky; R. Frijns; Catherine Mallardeau; E. Daemen; M. Bonis; M. Varrot; M.-T. Basso; R. Penning de Vries; M. Brillouet


european solid state device research conference | 1990

A 12V BICMOS technology for mixed analog-digital applications with high performance vertical pnp

Catherine Mallardeau; P. Keen; A. Monroy; J.C. Marin; F. Dellova; P.A. Brunel; D. Celi; M. Roche


european solid state device research conference | 1989

1.2 μm BICMOS Technology for Mixed Analog-digital Applications

Catherine Mallardeau; P. Keen; A. Monroy; J.C. Marin; D. Celi; P.A. Brunel; M. Roche


device research conference | 2010

Phosphorus in the Polysilicon TiSi 2 System: Dopant Redistribution

Alex Kalnitsky; Paul K. Hurley; Arnaud Yves Lepert; Catherine Mallardeau; Eoin Sheehan; Alan Mathewson


Archive | 2002

Integrated circuit with dram memory cell and the production method thereof

Catherine Mallardeau; Pascale Mazoyer; Marc Piazza

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