Chenfei Zhang

A physical based model to predict performance degradation of FinFET accounting for interface state distribution effect due to hot carrier injection

Abstract A physical based model for predicting the performance degradation of the FinFET is developed accounting for the interface state distribution effect due to hot carrier injection (HCI). The non-uniform distribution of interface state along the FinFET channel is first extracted by a forward gated-diode method and then reproduced by an empirical model. From this, a physical-based device model, which accounts for the interface state distribution effect, is developed to predict the performance degradation of FinFET. The result shows that the developed model not only matches well with the experimental data of FinFET in all operation regions, but also predicts the asymmetric degradation of saturation drain current in forward and reverse operation mode. Finally, the impact of HCI to a 6-T SRAM cell is simulated using HSPICE.

A novel approach to simulate Fin-width Line Edge Roughness effect of FinFET performance

This paper developed a full three-dimensional (3-D) statistical simulation approach to investigate Fin-width Line Edge Roughness (LER) effect on the FinFETs performance. The line edge roughness is introduced by Matlab program, and then the intrinsic parameter fluctuations at fixed LER parameters are studied in carefully designed simulation experiments. The result shows that Fin-width LER causes a dramatic shift and fluctuations in threshold voltage. The simulation results also imply that the velocity saturation effect may come into effect even under low drain voltage due to LER effect.

Impact of random dopant fluctuation effect on surrounding gate MOSFETs: from atomic level simulation to circuit performance evaluation

This paper investigates the impact of random dopant fluctuation effect on surrounding gate MOSFET, from atomic statistical simulation of device to circuit performance evaluation. The doping profile is generated by an analysis of each lattice atom and then the threshold voltage variation is obtained by device Drift-Diffusion simulation. Then the circuit performance evaluation is performed by feeding the result into a surrounding-gate MOSFET model. It is shown that a significant fluctuation in threshold voltage is due to the decreasing volume. The circuit simulation results also reveal that a surrounding gate MOSFET based 6-T SRAM presents a promising resistibility to noise disturbance.

Forward gated-diode method for extracting gate oxide thickness and body doping concentration

In this paper, the forward gated-diode method is used to extract the gate oxide thickness and doping concentration of MOS device simultaneously. The gate oxide thickness and body doping concentration are first extracted from the recombination-generation (R-G) current, and then from the simulation result of ISE-Dessis. The results obtained from R-G method shows a good agreement with the simulation data.