Chih Chieh Yeh

PHINES: a novel low power program/erase, small pitch, 2-bit per cell flash memory

A novel flash memory cell named PHINES (Programming by hot Hole Injection Nitride Electron Storage) is proposed. PHINES uses a nitride trapping storage cell structure, and channel FN erase is performed to raise Vt while programming is done by lowering local Vt through band-to-band hot hole injection. Two physical bits storage, low power P/E, high endurance, good retention and high scaling capability are achieved.

Reliability models of data retention and read-disturb in 2-bit nitride storage flash memory cells

The reliability issues of two-bit storage nitride flash memory cells, including low-V/sub t/ state threshold voltage instability, read-disturb, and high-V/sub t/ state charge loss are addressed. The responsible mechanisms and reliability models are discussed. Our study shows that the cell reliability is strongly dependent on operation methods and process conditions.

Novel operation schemes to improve device reliability in a localized trapping storage SONOS-type flash memory

Over erasure, charge gain in the low Vt state, and charge loss in the high Vt state are found to be the most severe reliability issues in a localized trapping storage flash memory cell. In this paper, based on our understanding of physical mechanisms, we demonstrate that by adding vertical electrical field treatments during program/erase operations, the over erasure and data retentivities in high/low Vt states are significantly improved.

A novel silicon-nitride based light-emitting transistor (SiNLET): optical/electrical properties of a SONOS-type three-terminal electroluminescence device for optical communication in ULSI

A novel silicon-nitride based light-emitting transistor (SiNLET) is proposed for the first time. This three-terminal electroluminescence device uses a SONOS-type device structure, and its process is compatible to standard CMOS devices. Photons are generated by Fowler-Nordheim electron (FN-E) tunnel-injection, band-to-band tunneling induced hot-hole (BTBT-HH) injection, and carrier scattering/trapping/recombination via nitride traps. SiNLET with an effective device area of 0.616 mum2 is demonstrated for display and optical communication purposes

Highly scalable NAND-type PHINES flash memory for data flash applications

In this paper, two NAND-type PHINES flash memory architectures (1 bit/cell and physically 2 bit/cell) are proposed for mass storage applications. PHINES nitride trapping storage flash memory features high storage density, low power operation, good reliability, simple process, and high programming throughput. Fifteen-nm generation is feasible for future flash memory technology

A Novel Soft-Program for a Narrow Erased State Vt Distribution, Read Disturbance Suppression and Over-Program Annihilation in Multilevel Cell Flash Memories

In floating gate flash memories, anode hot hole injection induced by the channel FN erase will result in tunnel oxide degradation, severe read disturbance and an abnormally fast program. All of these issues are critical for multilevel cell (MLC) flash memory design, which requires precise threshold voltage placement, good data retentivity and programming controllability. In this paper, a novel soft-program scheme is proposed to narrow the threshold voltage distribution in the first level. Cycling-induced read disturbance and programming inaccuracy are also reduced. This technique is essential for the application of more-than-2-bit MLC flash memories.