Christian Fager

A Comparative Analysis of the Complexity/Accuracy Tradeoff in Power Amplifier Behavioral Models

A comparative study of state-of-the-art behavioral models for microwave power amplifiers (PAs) is presented in this paper. After establishing a proper definition for accuracy and complexity for PA behavioral models, a short description on various behavioral models is presented. The main focus of this paper is on the modeling accuracy as a function of computational complexity. Data is collected from measurements on two PAs-a general-purpose amplifier and a Doherty PA designed for WiMAX-for different output power levels. The models are characterized in terms of accuracy and complexity for both in-band and out-of-band error. The results show that, among the models studied, the generalized memory polynomial behavioral model has the best tradeoff for accuracy versus complexity for both PAs, and can obtain high performance at half of the computational cost of all other models analyzed.

Design of Varactor-Based Tunable Matching Networks for Dynamic Load Modulation of High Power Amplifiers

In this paper, the design of varactor-based tunable matching networks for dynamic load modulation of high power amplifiers (PAs) is presented. Design guidelines to overcome the common breakdown, and tunability problems of the varactors for high power applications are proposed. Based on the guidelines, using commercially available abrupt junction silicon varactors, a tunable matching network is built and measured. The matching network is then used for load modulation of a 1-GHz 7-W class-E LDMOS PA. Static measurements of the load modulated PA show that the power-added efficiency of the PA is improved by an absolute value of 10% at 10-dB backoff. This promising result proves, for the first time, the feasibility of load modulation techniques for high-power applications in the gigahertz frequency range.

Prediction of IMD in LDMOS transistor amplifiers using a new large-signal model

In this paper, the intermodulation distortion (IMD) behavior of LDMOS transistors is treated. First, an analysis is performed to explain measured IMD characteristics in different classes of operation. It is shown that the turn-on region plays an important role in explaining measured IMD behavior, which may also give a clue to the excellent linearity of LDMOS transistors. Thereafter, with this knowledge, a new empirical large-signal model with improved capability of predicting IMD in LDMOS amplifiers is presented. The model is verified against various measurements at low as well as high frequency in a class-AB power amplifier circuit.

A comprehensive analysis of IMD behavior in RF CMOS power amplifiers

This paper presents a comprehensive analysis of nonlinear intermodulation distortion (IMD) behavior in RF CMOS power amplifiers (PAs). Separate analyses are presented for small- and large-signal operation regimes. Especially, a new, simple, large-signal behavioral IMD analysis method is presented that allows the mechanisms dominant for IMD generation to be identified and their individual contributions to be studied. By combining these analyses, typical IMD versus input power characteristics of MOSFET PAs can be predicted and understood for different classes of operation. Various measurements made on a 950-MHz RF CMOS PA are used to demonstrate typical behavior and validate the proposed theory. Prediction of IMD using a standard CMOS transistor model is also evaluated and is shown to give good agreement with the measurements.

Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology

Highly integrated transmitter and receiver MMICs have been designed in a commercial 0.15 /spl mu/m, 88 GHz f/sub T//183 GHz f/sub MAX/ GaAs pHEMT MMIC process and characterized on both chip and system level. These chips show the highest level of integration yet presented in the 60 GHz band and are true multipurpose front-end designs. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.5 GHz. Although the chips are inherently multipurpose designs, they are especially suitable for high-speed wireless data transmission due to their very broadband IF characteristics. The single-chip transmitter MMIC consists of a balanced resistive mixer with an integrated ultra-wideband IF balun, a three-stage power amplifier, and the X8 LO chain. The X8 is a multifunction design by itself consisting of a quadrupler, a feedback amplifier, a doubler, and a buffer amplifier. The transmitter chip delivers 3.7/spl plusmn/1.5 dBm over the RF frequency range of 54-61 GHz with a peak output power of 5.2 dBm at 57 GHz. The single-chip receiver MMIC contains a three-stage low-noise amplifier, an image reject mixer with an integrated ultra-wideband IF hybrid and the same X8 as used in the transmitter chip. The receiver chip has 7.1/spl plusmn/1.5 dB gain between 55 and 63 GHz, more than 20 dB of image rejection ratio between 59.5 and 64.5 GHz, 10.5 dB of noise figure, and -11 dBm of input-referred third-order intercept point (IIP3).

Design of a Concurrent Dual-Band 1.8–2.4-GHz GaN-HEMT Doherty Power Amplifier

In this paper, the design, implementation, and experimental results of a high-efficiency dual-band GaN-HEMT Doherty power amplifier (DPA) are presented. An extensive discussion about the design of the passive structures is presented showing different possible topologies of the dual-band DPA. One of the proposed topologies is used to design a dual-band DPA in hybrid technology for the frequency bands 1.8 and 2.4 GHz with the second efficiency peak at 6-dB output power back-off (OBO). For a continuous-wave output power of 20 W, the measured power-added efficiency (PAE) is 64% and 54% at 1.8 and 2.4 GHz, respectively. At -dB OBO, the resulting measured PAEs were 60% and 44% in the two frequency bands. Linearized concurrent modulated measurement using 10-MHz LTE signal with 7-dB peak-to-average-ratio (PAR) at 1.8 GHz and 10-MHz WiMAX signal with 8.5-dB PAR at 2.4 GHz shows an average PAE of 34%, at an adjacent channel leakage ratio of -48 dBc and -46 dBc at 1.8 and 2.4 GHz, respectively.

Design of a Highly Efficient 2–4-GHz Octave Bandwidth GaN-HEMT Power Amplifier

In this paper, the design, implementation, and experimental results of a high-efficiency wideband GaN-HEMT power amplifier are presented. A method based on source-pull/load-pull simulation has been used to find optimum source and load impedances across the bandwidth and then used with a systematic approach to design wideband matching networks. Large-signal measurement results show that, across 1.9-4.3 GHz, 9-11-dB power gain and 57%-72% drain efficiency are obtained while the corresponding power-added efficiency (PAE) is 50%-62%. Moreover, an output power higher than 10 W is maintained over the band. Linearized modulated measurements using a 20-MHz long-term evolution signal with 11.2-dB peak-to-average ratio show an average PAE of 27% and 25%, an adjacent channel leakage ratio of -44 and -42 dBc at 2.5 and 3.5 GHz, respectively.

60 GHz Single-Chip Front-End MMICs and Systems for Multi-Gb/s Wireless Communication

Single-chip 60 GHz transmitter (TX) and receiver (RX) MMICs have been designed and characterized in a 0.15mum (fT~ 120 GHz/f MAX> 200 GHz) GaAs mHEMT MMIC process. This paper describes the second generation of single-chip TX and RX MMICs together with work on packaging (e.g., flip-chip) and system measurements. Compared to the first generation of the designs in a commercial pHEMT technology, the MMICs presented in this paper show the same high level of integration but occupy smaller chip area and have higher gain and output power at only half the DC power consumption. The system operates with a LO signal in the range of 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO multiplier chain, resulting in an IF center frequency of 2.5 GHz. Packaging and interconnects are discussed and as an alternative to wire bonding, flip-chip assembly tests are presented and discussed. System measurements are also described where bit error rate (BER) and eye diagrams are measured when the presented TX and RX MMICs transmits and receives a modulated signal. A data rate of 1.5 Gb/s with simple ASK modulation was achieved, restricted by the measurement setup rather than the TX and RX MMICs. These tests indicate that the presented MMICs are especially well suited for transmission and reception of wireless signals at data rates of several Gb/s

A Modified Doherty Power Amplifier With Extended Bandwidth and Reconfigurable Efficiency

This paper derives the theory and presents measurements of a new power amplifier based on the Doherty power amplifier topology. It is theoretically shown that the proposed amplifier can simultaneously provide high efficiency at both full output power and at output power back-off, over a much improved bandwidth compared to the conventional Doherty power amplifier. It is also shown that the proposed amplifier allows reconfiguration of the efficiency in power back-off without the need of tunable elements.

I/Q Imbalance Compensation Using a Nonlinear Modeling Approach

In-phase/quadrature (I/Q) imbalance is one of the main sources of distortion in RF modulators. In this paper, a dual-input nonlinear model based on a real-valued Volterra series is proposed for compensation of the nonlinear frequency-dependent I/Q imbalance. First, different sources of distortion are identified from experimental measurements, then a dual-input nonlinear I/Q imbalance model is developed. Further, the inverse model is used for I/Q imbalance compensation. Finally, the performance of the I/Q imbalance compensator is evaluated with both simulations and experiments. In comparison with previously published results, the proposed I/Q imbalance compensator shows significantly improved performance. Thus, we prove that a complete nonlinear I/Q imbalance compensation can minimize the effects of the RF modulator in high-performance digital communication systems.