Christopher A. Spence
Advanced Micro Devices
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Featured researches published by Christopher A. Spence.
Photomask and next-generation lithography mask technology. Conference | 2001
Lynn Cai; Khoi A. Phan; Christopher A. Spence; Linyong Pang; Kevin K. Chan
As Optical Proximity Correction (OPC0 and Phase Shifting (PSM) become more and more commonly used for producing smaller features on wafer, the photomask (reticle) manufacturing, that is mask writing, inspection and repairing, and quality assurance become more challenging for both mask shops and wafer fabs. Consequently, a powerful defect analysis tool is needed to determine which defect is a nuisance defect, which defect needs to be repaired, and how good is the repair. It should have the capability for defect printability prediction and analysis of defect impact on device performance. In this paper, we will study and characterize the printability prediction of programmed defects on binary OPC masks by the Virtual Stepper System with its newly developed Automated Defect Severity Scoring (ADSS) function. AMDs defect test reticles HellOPC2 were used. The Virtual Stepper simulation and defect impact analysis results (the automatically calculated Defect Severity Score) will be compared to the SEM images and measurements of wafer prints using 193nm lithography. The results demonstrate that the Virtual Stepper System with its ADSS feature can provide its user with an automate, fast and accurate way of analyzing the impact of a defect. The Virtual Stepper System with ADSS function will be a suitable tool for photomask defect critically assessment in mask shops and wafer fabs.
Optical Microlithography XVI | 2003
Rolf Seltmann; Rolf Stephan; Martin Mazur; Christopher A. Spence; Bruno La Fontaine; Dirk Stankowski; Andre Poock; Wolfram Grundke
The paramount importance of CD-control for logic speed is well recognized. Whereas across wafer-line-width-variation (AWLV) influences the width of the speed distribution, across chip line-width-variation (ACLV) is a dominating factor for device leakage. In our study we will discuss different ACLV-terms based on AMD’s 0.18 and 0.13μm processes. We will show how the variation of different scanner and reticle-parameters affects both random and systematic ACLV-components. We will show that the systematic part either can be dominated by global or layout-specific CD-signature, depending on the reticle manufacturing process, scanner condition and the circuit design. In particular we will discuss the impact of defocus, lens aberrations, illumination uniformity dose accuracy and flare. Eventually, we will show the response of critical performance parameters of state of the art μPs and we will judge different parameters with respect to their impact on μP-speed. Focus control and flare control are found to be the most critical tasks. We will discuss appropriate methods to ensure both focus and flare don’t affect device performance negatively.
26th Annual International Symposium on Microlithography | 2001
Cyrus E. Tabery; Christopher A. Spence
The extendibility of alternating aperture phase shifting masks (AAPSM) is investigated using reticle topography simulation. Aerial image measurements with an ArF AIMS tool are used to calibrate the simulated performance of the AAPSM. Simulations are performed for several illumination conditions through pitch allowing understanding of reticle performance that will be required to reach the 70nm node. Simulation convergence, speed, and memory requirements are also reported on for Solid CM. Experimental AIMS data are analyzed to extract the effective phase through pitch for several etch targets. These phase measurements are compared to simulations using AFM characterization of the same mask. Simulated aerial images through pitch are directly compared to those measured on AIMS. Qualitative agreement between AIMS and simulated images is obtained, but the contrast of the AIMS images is consistently lower. Image balance sensitivity, phase error sensitivity, and quartz sidewall angle sensitivity are defined and examined to identify performance limiting aspects of implementing AAPSM for the 70nm node over a range of pitches. Example phase sensitivity values are derived using mask topography simulation and used to define phase error specifications. AIMS and mask topography simulation show that smaller pitches and spaces are more sensitive to etch depth variation. Simulation also reveals quartz sidewall angle variation results in an apparent phase error where an under-cut behaves like an over-etch and inward sloping sidewalls behave like an under-etch. A correction to the well known etch target formula is proposed to account for sidewall angle variation.
23rd Annual BACUS Symposium on Photomask Technology | 2003
Bruno La Fontaine; Adam R. Pawloski; Alden Acheta; Yunfei Deng; Harry J. Levinson; Christopher A. Spence; Christian Chovino; Laurent Dieu; Eric Johnstone; Franklin D. Kalk
The impact of wafer and reticle anti-reflection coatings (ARCs) on the aerial image of ArF lithography scanners is measured using contrast curves and critical dimension (CD) analysis. The importance of a good ARC layer on the wafer appears to be greater than that of the reticle-ARC. In fact, for state-of-the-art lithography scanners, the influence of the reticle-ARC is practically undetectable. Numerical simulations are used to understand the relative contributions of the lens, the wafer and the reticle to the overall loss of contrast associated with non-optimized ARCs.
Archive | 1999
Luigi Capodieci; Christopher A. Spence
Archive | 2002
Kouros Ghandehari; Jean Y. Yang; Christopher A. Spence
Archive | 1996
Christopher A. Spence
Archive | 1996
Christopher A. Spence
Archive | 1999
Luigi Capodieci; Christopher A. Spence
Archive | 2004
Cyrus E. Tabery; Chris Haidinyak; Todd P. Lukanc; Luigi Capodieci; Carl P. Babcock; Hung-Eil Kim; Christopher A. Spence