Cleber Biasotto

X-ray Nanodiffraction on a Single SiGe Quantum Dot inside a Functioning Field-Effect Transistor

For advanced electronic, optoelectronic, or mechanical nanoscale devices a detailed understanding of their structural properties and in particular the strain state within their active region is of utmost importance. We demonstrate that X-ray nanodiffraction represents an excellent tool to investigate the internal structure of such devices in a nondestructive way by using a focused synchotron X-ray beam with a diameter of 400 nm. We show results on the strain fields in and around a single SiGe island, which serves as stressor for the Si-channel in a fully functioning Si–metal–oxide semiconductor field-effect transistor.

n-Channel MOSFETs Fabricated on SiGe Dots for Strain-Enhanced Mobility

The silicon germanium dots grown in the Stranski-Krastanow mode are used to induce biaxial tensile strain in a silicon capping layer. A high Ge content and correspondingly high Si strain levels are reached due to the 3-D growth of the dots. The n-channel MOS devices, referred to in this letter as DotFETs, are processed with the main gate segment above the strained Si layer on a single dot. To prevent the intermixing of the Si/SiGe/Si structure, a novel low-temperature FET structure processed below 400°C has been implemented: The ultrashallow source/drain junctions formed by excimer-laser annealing in the full-melt mode of ion-implanted dopants are self-aligned to a metal gate. The crystallinity of the structure is preserved throughout the processing, and compared to reference devices, an average increase in the drain current of up to 22.5% is obtained.

Integration of laser-annealed junctions in a low-temperature high-k metal-gate MISFET

Integration and properties of devices processed by excimer laser annealing are presented. The best results are achieved by shallow implantations into a native-oxide-free silicon surface and laser annealing with the remainder of the device protected by an Al reflective layer. Low-temperature MISFETs are fabricated with a metal-gate high-k gate stack of PECVD SiO2 and ALD Al2O3 with an EOT of 9.2 nm and an Al-gate. The source/drain regions are self-aligned to the metal gate, which also serves as a laser masking reflective layer. Ablation of the masking layer is prevented due to the low thermal resistance of the thin underlying gate dielectric. The measured devices exhibit good current drivability, which improves with higher laser energy. The maximum processing temperature of the presented MISFETs is 400°C and can potentially to be reduced down to 300°C.

Ultrashallow doping by excimer laser drive-in of RPCVD surface deposited arsenic monolayers

Reduced pressure CVD of arsenic has been investigated as a source of dopants in combination with excimer laser annealing (LA). Energy densities used for LA are above the Si melt limit and abrupt, highly doped, nearly defect-free, ultrashallow junctions have been formed. The junction depth is determined by the melt depth and is independent of the doping level, which is determined by the As deposition. Multiple LA of the surface deposited As layer was performed to yield improved uniformity while multiple cycles of As deposition plus LA have been performed to yield a higher dose and consequently lower sheet resistance, which in the case of three depositions drops to around 80 Ω/sq for layers of an estimated depth of less than 20 nm. Near-ideal diode characteristics have been measured.

Application of laser annealing in the EU FP6 project D-DotFET

Full-melt high-power excimer laser annealing is investigated as a means of activating implanted source/drain regions in a MISFET structure, which could be positioned on a SiGe dot in such a manner that strain is transferred to the channel region. Such a ¿DotFET¿ device is the focus of the EU FP6 project D-DotFET. A MISFET structure fabricated at suitably low processing temperatures, below 400°C, is demonstrated with a metal/high-k gate-stack that is self-aligned to laser-annealed S/D regions.

MOSFETs on self-assembled SiGe dots with strain-enhanced mobility

Silicon-germanium dots grown in the Stranski-Krastanow mode are investigated as sources of strain for electron mobility enhancement in the silicon capping layer. N-channel MOSFETs with the channel in the Si cap-layer over the SiGe dot (DotFETs) are fabricated in a custom-made process and have an average increase in drain current of up to 22.5% compared to the reference devices. The sources of device variations related to the dimensions of the main gate-segment are identified and their influence on device performance evaluated, confirming the mobility enhancement.

Laser Annealing of Self-Aligned As+ Implants in Contact Windows for Ultrashallow Junction Formation.

In the past it has been shown that ultrashallow junctions with minimum lateral dimensions can be made by implanting self-aligned to the contact window and using one-shot excimer laser annealing (ELA) to activate the dopants. Besides the recrystallization of the implanted Si, the final structuring at the contact window perimeter is very important for the ideality of the diode. In this paper this process is has been investigated for 5 keV As+ implanted in windows etched in a thermal/LPCVD oxide layer stack. The window perimeter processing is very critical but tilted implants can be used to increase the junction overlap with the window and good diode characteristics are obtained. The junction depths have been analyzed by secondary ion mass spectrometry (SIMS) and transmission electron microscopy (TEM). A junction of only 15 nm deep with a sheet resistance of 311 ?/square was obtained for an implantation tilt angle of 45o and laser energy density of 1000 mJ/cm2, whereas the junction depth of 20 nm and sheet resistance of 220 ?/square was obtained for the tilt of 7o.