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Dive into the research topics where V. Gonda is active.

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Featured researches published by V. Gonda.


IEEE Journal of Solid-state Circuits | 2009

Improved RF Devices for Future Adaptive Wireless Systems Using Two-Sided Contacting and AlN Cooling

Lis K. Nanver; H. Schellevis; T.L.M. Scholtes; L. La Spina; G. Lorito; F. Sarubbi; V. Gonda; M. Popadic; K. Buisman; L.C.N. de Vreede; Cong Huang; S. Milosavljevic; E.J.G. Goudena

This paper reviews special RF/microwave silicon device implementations in a process that allows two-sided contacting of the devices: the back-wafer contacted silicon-on-glass (SOG) substrate-transfer technology (STT) developed at DIMES. In this technology, metal transmission lines can be placed on the low-loss glass substrate, while the resistive/capacitive parasitics of the silicon devices can be minimized by a direct two-sided contacting. Focus is placed here on the improved device performance that can be achieved. In particular, high-quality SOG varactors have been developed and an overview is given of a number of innovative highly-linear circuit configurations that have successfully made use of the special device properties. A high flexibility in device design is achieved by two-sided contacting because it eliminates the need for buried layers. This aspect has enabled the implementation of varactors with special Ndx -2 doping profiles and a straightforward integration of complementary bipolar devices. For the latter, the integration of AlN heatspreaders has been essential for achieving effective circuit cooling. Moreover, the use of Schottky collector contacts is highlighted also with respect to the potential benefits for the speed of SiGe heterojunction bipolar transistors (HBTs).


international conference on advanced thermal processing of semiconductors | 2005

Near-ideal implanted shallow-junction diode formation by excimer laser annealing

V. Gonda; A. Burtsev; T.L.M. Scholtes; Lis K. Nanver

Sub-50 nm junction depth p+n and n+p diodes are formed by excimer laser annealing (ELA) of BF2 + and As+ implants, respectively, performed directly in the contact windows. The latter are etched through a stack composed of a reflective Al masking layer deposited on a silicon oxide isolation layer. The etching process, the laser anneal energy and the implantation parameters are optimized for low surface roughness at the silicon surface of the contact with respect to the final junction depth and good edge coverage of the diodes. In this manner near-ideal diode characteristics with ideality factors of 1.06-1.16 and low contact resistances are achieved in the laser energy processing window of 800-1000 mJ/cm2 . Moreover, the uniformity and reproducibility over the wafer is excellent


bipolar/bicmos circuits and technology meeting | 2008

Special RF/microwave devices in Silicon-on-Glass Technology

Lis K. Nanver; H. Schellevis; T.L.M. Scholtes; L. La Spina; G. Lorito; F. Sarubbi; V. Gonda; M. Popadic; K. Buisman; L.C.N. de Vreede; Cong Huang; S. Milosavljevic; E.J.G. Goudena

This paper reviews special RF/microwave silicon device implementations in the back-wafer contacted Silicon-On-Glass (SOG) Substrate-Transfer Technology (STT) developed at DIMES. In this technology, metal transmission lines can be placed on the low-loss glass substrate, while the resistive/capacitive parasitics of the silicon devices can be minimized by a direct two-sided contacting. Focus is placed here on the device level aspects of the SOG process. In particular, complementary bipolar device integration and high-quality varactors for high-linearity adaptive circuits are treated in relationship to developments in back-wafer contacting and the integration of AlN heatspreaders.


international conference on solid state and integrated circuits technology | 2006

Silicon-on-glass technology for RF and microwave device fabrication

Lis K. Nanver; H. Schellevis; T.L.M. Scholtes; L. La Spina; G. Lorito; F. Sarubbi; V. Gonda; M. Popadic; K. Buisman; L.C.N. de Vreede; Cong Huang; S. Milosavljevic; E.J.G. Goudena

This paper reviews the applications and potentials of back-wafer contacted silicon-on-glass (SOG) substrate-transfer technology (STT) particularly for RF and microwave silicon-device-design enhancement. This type of SOG process gives direct access to the part of the device that is usually connected via the bulk Si, by allowing advanced patterning and contacting of the backside of the wafer (back-wafer) with respect to the front of the wafer (front-wafer). In this manner the resistive and capacitive parasitics of the device itself, which in silicon often inhibit high-frequency (HF) performance, can be reduced to a minimum. At the same time new device concepts are made possible. Examples of fabricated devices (varactor diodes, vertical double-diffused MOSFETs (VDMOSFETs) and complementary bipolar transistors) are given and described in relationship to issues such as the very limited thermal budget permitted in the back-wafer processing and the inherently high thermal resistance of the SOG devices


international conference on ultimate integration on silicon | 2009

Integration of laser-annealed junctions in a low-temperature high-k metal-gate MISFET

Cleber Biasotto; Vladimir Jovanović; V. Gonda; Johan van der Cingel; S. Milosavljevic; Lis K. Nanver

Integration and properties of devices processed by excimer laser annealing are presented. The best results are achieved by shallow implantations into a native-oxide-free silicon surface and laser annealing with the remainder of the device protected by an Al reflective layer. Low-temperature MISFETs are fabricated with a metal-gate high-k gate stack of PECVD SiO2 and ALD Al2O3 with an EOT of 9.2 nm and an Al-gate. The source/drain regions are self-aligned to the metal gate, which also serves as a laser masking reflective layer. Ablation of the masking layer is prevented due to the low thermal resistance of the thin underlying gate dielectric. The measured devices exhibit good current drivability, which improves with higher laser energy. The maximum processing temperature of the presented MISFETs is 400°C and can potentially to be reduced down to 300°C.


international conference on microelectronics | 2006

Reliability Issues Related to Laser-Annealed Implanted Back-Wafer Contacts in Bipolar Silicon-on-Glass Processes

G. Lorito; V. Gonda; S. Liu; T.L.M. Scholtes; H. Schellevis; Lis K. Nanver

Silicon-on-glass vertical NPNs and PNPs with collector contacts on the back of the wafer directly under the emitter are investigated in relationship to the collector contacting method. Increased base-leakage and impact-ionization currents were found when the collector contacts were implanted. This effect is related to the residual implantation damage at a distance from the contact that cannot be thermal annealed during the low-temperature back-wafer processing


international conference on solid-state and integrated circuits technology | 2008

Ultra-low-temperature process modules for back-wafer-contacted silicon-on-glass RF/microwave technology

Lis K. Nanver; V. Gonda; Yann Civale; T.L.M. Scholtes; Luigi La Spina; H. Schellevis; G. Lorito; F. Sarubbi; M. Popadic; K. Buisman; S. Milosavljevic; E.J.G. Goudena

This paper reviews several novel process modules developed for the processing of the backside of the wafer of our substrate-transfer technology called back-wafer-contacted silicon-on-glass (SOG), which is in use for fabricating RF/microwave devices such as high-quality varactors and bipolar transistors. In this technology the silicon wafer is transferred to glass by gluing. The integrity of the acrylic adhesive limits the subsequent processing temperatures to less than 300°C. Ultra-low-temperature process modules have therefore been developed to nevertheless allow the creation of low-ohmic contacts and high-quality ultrashallow junctions. Moreover, a physical-vapor deposition of AlN provides an effective means of integrating a thin-film dielectric heatspreader.


international conference on advanced thermal processing of semiconductors | 2008

Ultrashallow doping by excimer laser drive-in of RPCVD surface deposited arsenic monolayers

M. Popadic; Lis K. Nanver; Cleber Biasotto; V. Gonda; Johan van der Cingel

Reduced pressure CVD of arsenic has been investigated as a source of dopants in combination with excimer laser annealing (LA). Energy densities used for LA are above the Si melt limit and abrupt, highly doped, nearly defect-free, ultrashallow junctions have been formed. The junction depth is determined by the melt depth and is independent of the doping level, which is determined by the As deposition. Multiple LA of the surface deposited As layer was performed to yield improved uniformity while multiple cycles of As deposition plus LA have been performed to yield a higher dose and consequently lower sheet resistance, which in the case of three depositions drops to around 80 Ω/sq for layers of an estimated depth of less than 20 nm. Near-ideal diode characteristics have been measured.


international conference on microelectronics | 2008

RF/microwave device fabrication in silicon-on-glass technology

Lis K. Nanver; H. Schellevis; T.L.M. Scholtes; L. La Spina; G. Lorito; F. Sarubbi; V. Gonda; M. Popadic; K. Buisman; L.C.N. de Vreede; Cong Huang; S. Milosavljevic; E.J.G. Goudena

This paper reviews recent developments in circuit and device implementations based on back-wafer contacted silicon-on-glass (SOG) substrate-transfer technology (STT). This technology has been specifically developed for the enhancement of silicon RF and microwave device and circuit performance. While metal transmission lines can be placed on the low-loss glass substrate, the resistive and capacitive parasitics of the silicon devices can also be minimized by a direct contacting of the parts of the devices that are usually connected via the bulk Si. Focus is placed here on the device level aspects of the SOG process, in particular high-quality varactors for high-linearity adaptive circuits and complementary bipolar device integration are treated in relationship to new developments in back-wafer contacting and the integration of AlN heatspreaders.


international conference on advanced thermal processing of semiconductors | 2007

Silicon Laser Annealing by a Two-Pulse Laser System with Variable Pulse Offsets

V. Gonda; J. Slabbekoorn; Lis K. Nanver

Double-pulsed high-power excimer laser annealing is investigated for use as a means of implanted dopant activation. The laser setup incorporates two lasers that allow double pulse laser annealing with pulse offsets much smaller than the repetition of the individual XeCl excimer lasers. In this configuration, the pulse offset can be fine tuned. Sheet resistances are measured and thermal simulations are conducted to study temperature profiles. Results show, that the total laser energy needed for a complete activation increases with the pulse separation. The increase can be compensated by substrate heating. In this way the thermal budget can be tuned with more freedom.

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T.L.M. Scholtes

Delft University of Technology

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G. Lorito

Delft University of Technology

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M. Popadic

Delft University of Technology

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Cleber Biasotto

Delft University of Technology

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F. Sarubbi

Delft University of Technology

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H. Schellevis

Delft University of Technology

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K. Buisman

Delft University of Technology

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S. Milosavljevic

Delft University of Technology

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E.J.G. Goudena

Delft University of Technology

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