Cody Mitchell

Design and Testing of a 1T-1C Dynamic Random Access Memory Cell Utilizing a Ferroelectric Transistor

The ferroelectric transistor (FeFET) provides unique characteristics of memory circuits due to its hysteresis effects. This paper examines the design considerations of a 1T-1C dynamic random-access memory (DRAM) cell using a ferroelectric transistor. The research investigates the effects of the FeFET on the DRAM cell while modifying design parameters which are controlled by the circuit designer. Parameters include channel width and length and write-word-line (WWL) voltage. Experimental data will be taken for different circuit configurations. Comparisons will be made to similar circuits that utilize only metal-oxide-semiconductor field effect transistors (MOSFETs).

Characteristics of a Three-Transistor DRAM Circuit Utilizing a Ferroelectric Transistor

Dynamic random-access memory (DRAM) cells offer advantages over static random-access memory (SRAM) cells due to their reduced size and relaxed constraints on device sizing ratios. In this paper, the usage of a metal-ferroelectric-semiconductor field effect transistor (MFSFET) in a three-transistor dynamic random-access memory (DRAM) cell is examined, in order to determine the effects caused by its hysteresis properties. Combinations of metal-oxide-semiconductor field effect transistors (MOSFETs) and MFSFETs are explored, along with implementations consisting only of MFSFETs. The effects seen in these circuit configurations will be compared to configurations using only MOSFETs. Experimental data will be presented, showing the effect of varying parameters of the devices and circuit, such as channel length and width, input voltage waveforms, load devices, and capacitance. Particularly, attention will be given to the application of waveforms containing negative voltages to the gates of the transistors.

Characteristics of a Nonvolatile SRAM Cell Utilizing a Ferroelectric Transistor

The SRAM cell circuit is a standard for volatile data storage. When utilizing one or more ferroelectric transistors, the hysteresis characteristics give unique properties to the SRAM circuit, providing for investigation into the development of a nonvolatile memory cell. This paper discusses various formations of the SRAM circuit, using ferroelectric transistors, n-channel and p-channel MOSFETs, and resistive loads. With varied source and supply voltages, the effects on the timing and retention characteristics are investigated, including retention times of up to 24 hours.

Switching Characteristics of Ferroelectric Transistor Inverters

This paper presents the switching characteristics of an inverter circuit using a ferroelectric field effect transistor, FeFET. The propagation delay time characteristics, τphl and τplh are presented along with the output voltage rise and fall times, τrise and τfall. The propagation delay is the time-delay between the V50% transitions of the input and output voltages. The rise and fall times are the times required for the output voltages to transition between the voltage levels V10% and V90%. Comparisons are made between the MOSFET inverter and the ferroelectric transistor inverter.

Static Characteristics of the Ferroelectric Transistor Inverter

The inverter is one of the most fundamental building blocks of digital logic, and it can be used as the foundation for understanding more complex logic gates and circuits. This paper presents the characteristics of an inverter circuit using a ferroelectric field-effect transistor. The voltage transfer characteristics are analyzed with respect to varying parameters such as supply voltage, input voltage, and load resistance. The effects of the ferroelectric layer between the gate and semiconductor are examined, and comparisons are made between the inverters using ferroelectric transistors and those using traditional MOSFETs.

Mathematical Models of the Common-Source and Common-Gate Amplifiers Using a Metal-Ferroelectric-Semiconductor Field Effect Transistor

Mathematical models of the common-source and common-gate amplifiers using metal-ferroelectric-semiconductor field effect transistors (MFSFETs) are developed in this paper. The models are compared against data collected with MFSFETs of varying channel lengths and widths, and circuit parameters such as biasing conditions are varied as well. Considerations are made for the capacitance formed by the ferroelectric layer present between the gate and substrate of the transistors. Comparisons between the modeled and measured data are presented in depth.

Empirical Data of the Metal-Ferroelectric-Semiconductor Field Effect Transistor Polarization and Channel Resistance for Timing and Retention Analysis

In this paper, empirical data describing the channel resistance and polarization of several metal-ferroelectric-semiconductor field-effect transistors (MFSFETs) is presented. Various channel length and width transistors were used to describe the channel resistance under various biasing conditions and in both positive and negative polarization states. The presented results and analysis provide insight into the switching speed between polarization states as well as the timing and retention constraints for a given set of device dimensions. This is of particular value when considering circuit designs that utilize MFSFETs, especially digital memory circuits.

Extended Characterization of the Common-Source and Common-Gate Amplifiers Using a Metal-Ferroelectric-Semiconductor Field Effect Transistor

Collected data for both common-source and common-gate amplifiers is presented in this paper. Characterizations of the two amplifier circuits using metal-ferroelectric-semiconductor field effect transistors (MFSFETs) are developed with wider input frequency ranges and additional device sizes compared to earlier characterizations. The effects of the ferroelectric layers capacitance and variation of load, quiescent point, or input signal on each circuit are shown. Advantages and applications of the MFSFET and the circuit performance are discussed.

I-V Characteristics of a Static Random Access Memory Cell Utilizing Ferroelectric Transistors

Due to the unique properties of hysteresis and nonlinearity, the use of ferroelectric materials in memory devices is widely researched. This paper presents the current-voltage (I-V) characteristics of a FeFET in the Static Random Access Memory (SRAM) cell. Empirical data will be analyzed using a variety of setup configurations using both MOSFETs as well as FeFETS. The drain current was measured with different gate and drain voltages while polarizing the ferroelectric material. Based on the empirical data, comparisons were made between the different MOSFET and FeFET configurations.