Todd C. MacLeod

Modeling of Metal-Ferroelectric-Semiconductor Field Effect Transistors

Abstract The characteristics for a MFSFET (metal-ferroelectric-semiconductor field effect transistor) is very different than a conventional MOSFET and must be modeled differently. The drain current has a hysteresis shape with respect to the gate voltage. The position along the hysteresis curve is dependent on the last positive or negative polling of the ferroelectric material. The drain current also has a logarithmic decay after the last polling. A model has been developed to describe the MFSFET drain current for both gate voltage on and gate voltage off conditions. This model takes into account the hysteresis nature of the MFSFET and the time dependent decay. The model is based on the shape of the Fermi-Dirac function which has been modified to describe the MFSFETs drain current. This is different from the model proposed by Chen et. al.[1] and that by Wu[2].

CHARACTERIZING AN ANALOG AMPLIFIER UTILIZING A FERROELECTRIC TRANSISTOR

ABSTRACT The use of ferroelectric materials for digital memory devices is widely researched and implemented, but ferroelectric devices also posses unique characteristics that made them have interesting and useful properties in analog circuits. Because ferroelectric transistors posses the properties of hysteresis and nonlinearity, an analog amplifier containing an FeFET has very different characteristics than one with a traditional FET. This paper characterizes the properties of a simple analog amplifier using both a traditional FET and a ferroelectric FET. The characterization includes voltage transfer, gain, frequency response, and operating modes. Because of the hysteresis effects the FeFET amplifier has two distinct operating modes, each with significantly different properties. These two regions have very different gain characteristics and are nonlinear. This has the effect of being able to program the FeFET to have two different voltage transfer/current characteristics with a single device. This can allow a flexible circuit that can change its analog properties on-the-fly with only a programming pulse. Modeled and measured data are presented showing the characteristics of this device. Comparisons are made between the ferroelectric device and the properties of a standard analog amplifier. Potential benefits and possible uses of such a device are presented.

Satellite test of radiation impact on Ramtron 512K FRAM

The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite. The test consists of writing and reading data with a ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is send to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test will be one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The memory devices being tested is a Ramtron Inc. 512K memory device. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.

Characterization of a Common-Source Amplifier Using Ferroelectric Transistors

This paper presents empirical data that was collected through experiments using a FeFET in the established common-source amplifier circuit. The unique behavior of the FeFET lends itself to interesting and useful operation in this widely used common-source amplifier. The paper examines the effect of using a ferroelectric transistor for the amplifier. It also examines the effects of varying load resistance, biasing, and input voltages on the output signal and gives several examples of the output of the amplifier for a given input. The difference between a common-source amplifier using a ferroelectric transistor and that using a MOSFET is addressed.

Modeling a Common-Source Amplifier Using a Ferroelectric Transistor

This paper presents a mathematical model characterizing the behavior of a common-source (CS) amplifier using a ferroelectric field-effect transistor (FeFET). The model is based on empirical data and incorporates several variables that affect the output, including frequency, load resistance, and gate-to-source voltage. Since the common-source amplifier is the most widely used amplifier in MOS technology, understanding and modeling the behavior of the FeFET-based common-source amplifier will help in the integration of FeFETs into many circuits.

A MATHEMATICAL MODEL OF A COMMON-DRAIN AMPLIFIER USING A FERROELECTRIC TRANSISTOR

ABSTRACT This paper presents a mathematical model characterizing the behavior of a common-drain amplifier using a FeFET. The model is based on empirical data and incorporates several variables that affect the output, including frequency, load resistance, and gate-to-source voltage. Since the amplifier is the basis of many circuit configurations, a mathematical model that describes the behavior of a FeFET-based amplifier will help in the integration of FeFETs into many other circuits.

Design of a Ferroelectric Programmable Logic Gate Array

A programmable logic gate array has been designed utilizing ferroelectric field effect transistors. The design has only a small number of gates, but this could be scaled up to a more useful size. Using FFETs in a logic array gives several advantages. First, it allows real-time programmability to the array to give high speed reconfiguration. It also allows the array to be configured nearly an unlimited number of times, unlike a FLASH FPGA. Finally, the Ferroelectric Programmable Logic Gate Array (FPLGA) can be implemented using a smaller number of transistors because of the inherent logic characteristics of an FFET. The devices were only designed and modeled using Spice models of the circuit, including the FFET. The actual device was not produced. The designs consist of a small array of logic gates. Other gates could easily be produced. They are linked by FFETs that control the logic flow. Timing and logic tables have been produced showing the array can produce a variety of logic combinations at a real time usable speed. This device could be a prototype for a device that could be put into imbedded systems that need the high speed of hardware implementation of logic and the complexity to need to change the logic algorithm. Because of the non-volatile nature of the FFET, it would also be useful in situations that needed to program a logic array once and use it repeatedly after the power has been shut off.

AN EMPIRICAL STUDY OF A FeFET-BASED ANALOG AMPLIFIER

ABSTRACT The use of ferroelectric field-effect transistors (FeFETs) to create simple amplifiers is not completely understood and has not been extensively studied. This paper summarizes the results of behavioral characterization of a FeFET-based analog amplifier. The characterization incorporates several variables that affect the amplifiers output, including frequency, load resistance, and gate-to-source voltage. More specifically, the relationship between the frequency of the input signal and each of the peak output voltage, phase shift of the output signal, and voltage gain is examined. Also analyzed is the effect of load resistance on each of these three output parameters. These relationships are noted in actual oscilloscope outputs.

MODELING OF A FERROELECTRIC FIELD-EFFECT TRANSISTOR STATIC RANDOM ACCESS MEMORY CELL

ABSTRACT Ferroelectric devices provide many benefits over standard Metal-Oxide Semiconductor (MOS) devices. There is considerable interest in the aerospace industry in the reliability and radiation hardening effects that the ferroelectric memory devices provide. The modeling of a Ferroelectric Static Random Access Memory (FeSRAM) cell is to be investigated. The SRAM memory cell under investigation is a standard four transistor cell with the MOS Field-Effect Transistors (MOSFETs) replaced with Ferroelectric Field Effect Transistors (FeFETs). The SRAM FeFETs were simulated by using a previously developed model. Comparisons were made between the FeSRAM and a standard MOSFET SRAM.

Design of a Multi-Level/Analog Ferroelectric Memory Device

ABSTRACT Increasing the memory density and utilizing the novel characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used a reference to determine the amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. It is predicted that each memory cell may be able to store 8 bits or more. The design is based on data taken from actual ferroelectric transistors. Although the circuit has not been fabricated, a prototype circuit is now under construction. The design of this circuit is different than multi-level FLASH or silicon transistor circuits. The differences between these types of circuits are described in this paper. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.