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Dive into the research topics where Craig S. Amrine is active.

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Featured researches published by Craig S. Amrine.


electronic components and technology conference | 2007

The Redistributed Chip Package: A Breakthrough for Advanced Packaging

Beth Keser; Craig S. Amrine; Trung Duong; Owen R. Fay; Scott M. Hayes; George R. Leal; William H. Lytle; Doug Mitchell; Robert J. Wenzel

The redistributed chip package (RCP) is a substrate-less embedded chip package that offers a low-cost, high performance, integrated alternative to current wirebond BGA and flip chip BGA packaging. Devices are encapsulated into panels while routing of signals, power, and ground is built directly on the panel. The RCP panel and signal build-up lowers the cost of the package by eliminating wafer bumping and substrates thereby enabling large scale assembly in panel form. The build-up provides better routing capabilities and better integration. Also, by eliminating bumping, the device interconnect is inherently Pb-free, and the stress of the package is reduced enabling ultra-low K device compatibility. The panel is created by attaching device active side down to a substrate, encapsulating and curing the devices, grinding to desired thickness, and then removing the substrate. Signal, power, and ground planes are created using redistribution-like processing. Multi-layer metal RCP packages have passed -40 to 125C air-to-air thermal cycling and HAST after MSL3/260 preconditioning.


2001 Microelectromechanical Systems Conference (Cat. No. 01EX521) | 2001

Motorola MEMS switch technology for high frequency applications

A. De Silva; C. Vaughan; Darrel R. Frear; Lifeng Liu; Shun-Meen Kuo; Juergen Foerstner; J. Drye; J. Abrokwah; Henry G. Hughes; Craig S. Amrine; C. Butler; Steven Markgraf; Heidi L. Denton; Stephen Springer

Motorola Semiconductor Products Sector (SPS) has made significant progress in developing an integrated MEMS switch network for use in next-generation portable wireless systems. This MEMS switch technology has significantly better RF characteristics than conventional PIN diodes or FET switches and consumes less power. The RF MEMS switch exhibits insertion loss under 0.3 dB, isolation greater than 50 dB, and operating power under 200 /spl mu/W. The RF MEMS switch chip is integrated with a high voltage charge pump plus control logic chips into a single package that provides a network system to accommodate low voltage requirements in portable wireless applications.


bipolar/bicmos circuits and technology meeting | 2007

Advanced Packaging: The Redistributed Chip Package

Beth Keser; Craig S. Amrine; Trung Duong; Scott M. Hayes; George R. Leal; William H. Lytle; Doug Mitchell; Robert J. Wenzel

The redistributed chip package (RCP) is a substrate-less embedded chip package that offers a low-cost, high performance, integrated alternative to current wirebond ball grid array (BGA) and flip chip BGA packaging. Devices are encapsulated into panels while routing of signals, power, and ground is built directly on the panel. The RCP panel and signal build up lowers the cost of the package by eliminating wafer bumping and substrates thereby enabling large scale assembly in panel form. The build up provides better routing capabilities and better integration. Also, by eliminating bumping, the device interconnect is inherently Pb-free, and the stress of the package is reduced enabling ultra-low-k device compatibility. The panel is created by attaching the device active side down to a substrate, encapsulating and curing the devices, grinding to desired thickness, and then removing the substrate. Signal, power, and ground planes are created using redistribution-like processing. Multilayer metal RCP packages have passed 40 to 125 C air-to-air thermal cycling and HAST after MSL3/260 preconditioning.


electronic components and technology conference | 2008

Implementation of a mobile phone module with redistributed chip packaging

Lakshmi N. Ramanathan; Beth Keser; Craig S. Amrine; Trung Duong; Scott M. Hayes; George R. Leal; Marc A. Mangrum; Douglas G. Mitchell; Robert J. Wenzel

The redistributed chip packaging is an embedded chip technology that eliminates the need for wirebonds and flip chip bumps. This technology enables smaller packages at a lower cost, while providing improved mechanical, electrical and thermal performance. The process involves producing panels placing the chip active face down along with an embedded ground plane (EGP) and screen printing encapsulant to embed the die. Subsequently alternate layers of dielectric and Cu metallization are built up and the packages are sawn into individual units. The use of wafer fabrication tools enables finer lines and spaces in the build-up layers. This paper will discuss process conditions during the panelization and the integration of the base function of an i.275 GSM/EDGE mobile phone into a single module measuring a maximum of 1 square inch. The design of the EGP and the role of simulations to achieve a robust, reliable package will also be discussed. The outputs included moisture sensitivity level (MSL) 3 testing, air-to-air thermal cycling (- 40C/125C) and unbiased highly accelerated stress testing (HAST). Testing of RCP packages will also be discussed.


Archive | 2002

Wafer level MEMS packaging

Jong-Kai Lin; William H. Lytle; Owen R. Fay; Steven Markgraf; Henry G. Hughes; Craig S. Amrine; Ananda P. De Silva


Archive | 2004

Die encapsulation using a porous carrier

Owen R. Fay; Craig S. Amrine; Kevin R. Lish


Archive | 2008

Integrated circuit package formation

Craig S. Amrine; William H. Lytle


Archive | 2006

Methods and apparatus for thermal management in a multi-layer embedded chip structure

Tien Yu T. Lee; Craig S. Amrine; Victor Chiriac; Lizabeth Ann Keser; George R. Leal; Robert J. Wenzel


Archive | 2004

Flexible carrier and release method for high volume electronic package fabrication

William H. Lytle; Craig S. Amrine


Archive | 2008

Packaging an integrated circuit die with backside metallization

Lakshmi N. Ramanathan; Craig S. Amrine; Jianwen Xu

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Owen R. Fay

Freescale Semiconductor

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Beth Keser

Freescale Semiconductor

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