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Dive into the research topics where Cung D. Tran is active.

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Featured researches published by Cung D. Tran.


advanced semiconductor manufacturing conference | 2008

Challenges in 65nm Poly, RX and STI Defect Learning

Chienfan Yu; Javier Ayala; Cung D. Tran; Anthony Santiago; Eric Meyette; Elizabeth Hampton; Garrett W. Oakley; Kenneth A. Bandy; Timothy M. McCormack; Rajasekhar Venigalla; Frederick A. Scholl

During manufacturing transitioning from 90 nm to 65 nm node in IBMs 300 mm fab, FEOL (front end of line) defect pareto shifted as a result of the changes in integration scheme. By combining the optically based in-line inspection and electrical kerf test, key yield detractors were identified and addressed. Not all optically detected defects are true killers. Wafer functional test and physical failure analysis provided the ultimate determination for the significance of detractors.


international workshop on physics of semiconductor devices | 2012

Characterization of silicide-silicon interface contact resistivity using 1-D dual transmission line model approximation of modified cross bridge kelvin measurements

Ankr Arya; Balaji Jayaraman; Mohit Bajaj; Abhisek Dixit; Cung D. Tran

Conventional 1D single level transmission line model (TLM) to extract silicide-silicon contact resistivity does not take into account silicide sheet resistance. In this paper, 1D dual level TLM model approximation is used for extraction of the silicide sheet resistance and silicide-silicon contact resistivity. Experiments involving Platinum content increase in Nickel Silicide and pre-silicide Carbon implant in Silicon Germanium (SiGe) PMOS is analyzed using our model.


Archive | 2012

SILICIDE CONTACTS HAVING DIFFERENT SHAPES ON REGIONS OF A SEMICONDUCTOR DEVICE

Emre Alptekin; Dong-Ick Lee; Viraj Y. Sardesai; Cung D. Tran; Jian Yu; Reinaldo A. Vega; Rajasekhar Venigalla


Archive | 2014

FORMATION OF AIR-GAP SPACER IN TRANSISTOR

Emre Alptekin; Viraj Y. Sardesai; Cung D. Tran; Reinaldo A. Vega


Archive | 2011

METHOD OF FORMING SILICIDE CONTACTS OF DIFFERENT SHAPES SELECTIVELY ON REGIONS OF A SEMICONDUCTOR DEVICE

Emre Alptekin; Dong-Ick Lee; Viraj Y. Sardesai; Cung D. Tran; Jian Yu; Reinaldo A. Vega; Rajasekhar Venigalla


Archive | 2012

Method of Manufacturing Dummy Gates of a Different Material as Insulation between Adjacent Devices

Emre Alptekin; Gregory A. Northrop; Viraj Y. Sardesai; Cung D. Tran


Archive | 2015

FORMATION OF METAL RESISTOR AND E-FUSE

Cung D. Tran; Emre Alptekin; Viraj Y. Sardesai; Reinaldo A. Vega


Archive | 2014

Selective dielectric spacer deposition for exposing sidewalls of a finFET

Emre Alptekin; Sameer H. Jain; Viraj Y. Sardesai; Cung D. Tran; Reinaldo A. Vega


Archive | 2012

Raised trench metal semiconductor alloy formation

Emre Alptekin; Ahmet S. Ozcan; Viraj Y. Sardesai; Cung D. Tran


Archive | 2010

Planar Silicide Semiconductor Structure

Henry K. Utomo; Sameer H. Jain; Cung D. Tran

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