Daniel S. H. Chan

A comparative study of extraction methods for solar cell model parameters

Abstract A comparative study of three methods for extracting solar cell parameters of the single-diode lumped-circuit model is presented. The methods compared are the curve-fitting method, an iterative 5-point method and a recently proposed analytical 5-point method. Parameter values were extracted using these three methods from experimental characteristics collected from two silicon cells over a range of illuminations and temperatures. The results show that the curve-fitting method can often give erroneous parameter values and the reasons for the errors are discussed. The 5-point methods are found to be reliable and accurate in situations where the model is a good approximation of cell performance. The analytical 5-point method, however, has the added advantage of simplicity. It is also found that for the cell measured, the single diode model is valid at illuminations above one-half AM1 but gives non-physical parameter values at lower illumination.

Nonvolatile flash memory device using Ge nanocrystals embedded in HfAlO high-/spl kappa/tunneling and control oxides: Device fabrication and electrical performance

We fabricated a nonvolatile Flash memory device using Ge nanocrystals (NCs) floating-gate (FG)-embedded in HfAlO high-/spl kappa/ tunneling/control oxides. Process compatibility and memory operation of the device were investigated. Results show that Ge-NC have good thermal stability in the HfAlO matrix as indicated by the negative Gibbs free energy changes for both reactions of GeO/sub 2/+Hf/spl rarr/HfO/sub 2/+Ge and 3GeO/sub 2/+4Al/spl rarr/2Al/sub 2/O/sub 3/+3Ge. This stability implies that the fabricated structure can be compatible with the standard CMOS process with the ability to sustain source-drain activation anneal temperatures. Compared with Si-NC embedded in HfO/sub 2/, Ge-NC embedded in HfAlO can provide more electron traps, thereby enlarging the memory window. It is also shown that this structure can achieve a low programming voltage of 6-7 V for fast programming, a long charge retention time of ten years maintaining a 0.7-V memory window, and good endurance characteristics of up to 10/sup 6/ rewrite cycles. This paper shows that the Ge-NC embedded in HfAlO is a promising candidate for further scaling of FG Flash memory devices.

Wide memory window in graphene oxide charge storage nodes

Solution-processable, isolated graphene oxide (GO) monolayers have been used as a charge trapping dielectric in TaN gate/Al2O3/isolated GO sheets/SiO2/p-Si memory device (TANOS). The TANOS type structure serves as memory device with the threshold voltage controlled by the amount of charge trapped in the GO sheet. Capacitance-Voltage hysteresis curves reveal a 7.5 V memory window using the sweep voltage of −5–14 V. Thermal reduction in the GO to graphene reduces the memory window to 1.4 V. The unique charge trapping properties of GO points to the potential applications in flexible organic memory devices.

A direct method for the extraction of diffusion length and surface recombination velocity from an EBIC line scan: planar junction configuration

A direct method of extracting bulk minority carrier diffusion length and surface recombination velocity from an EBIC line scan in the planar configuration is described. The accuracy of the method is verified by 3-D computer simulation and compared with existing methods. It mas found that this method is much simpler to use and gives better accuracy than existing methods. >

RF, DC, and reliability characteristics of ALD HfO/sub 2/-Al/sub 2/O/sub 3/ laminate MIM capacitors for Si RF IC applications

High-performance metal-insulator-metal capacitors using atomic layer-deposited HfO/sub 2/-Al/sub 2/O/sub 3/ laminate are fabricated and characterized for RF and mixed-signal applications. The laminate capacitor can offer high capacitance density (12.8 fF//spl mu/m/sup 2/) up to 20 GHz, low leakage current of 4.9/spl times/10/sup -8/ A/cm/sup 2/ at 2 V and 125/spl deg/C, and small linear voltage coefficient of capacitance of 211 ppm/V at 1 MHz, which can easily satisfy RF capacitor requirements for year 2007 according to the International Technology Roadmap for Semiconductors. In addition, effects of constant voltage stress and temperature on leakage current and voltage linearity are comprehensively investigated, and dependences of quadratic voltage coefficient of capacitance (/spl alpha/) on frequency and thickness are also demonstrated. Meanwhile, the underlying mechanisms are also discussed.

A review of near infrared photon emission microscopy and spectroscopy

Near infrared photon emission microscopy is an established fault localization technique for microelectronic failure analysis. Near infrared photon spectroscopy has the potential to become a useful defect characterization technique. In this paper, near infrared photon emission microscopy and spectroscopy are reviewed together with the instrumentation developments that allow these techniques to be effectively deployed for microelectronic failure analysis. The measurement results from pn junctions and saturated MOSFETs are correlated with the various photon emission mechanisms. Additional information that can be obtained from NIR systems over visible systems are also presented.

A review of laser induced techniques for microelectronic failure analysis

Recent developments have seen the use of scanning focused near infra-red (NIR) laser beams for fault localization and defect characterization in microelectronic failure analysis. Fault localization techniques are based on thermal stimulation and include power alteration techniques such as OBIRCH, TIVA, SEI, and tester based techniques such as RIL-SDL. Defect characterization techniques are based on carrier stimulation and include OBIC, SCOBIC and LIVA. A review of the concepts and application of these techniques together with the instrumentation requirements to effectively deploy these techniques are presented in this paper.

Self-assembly of Al2O3 nanodots on SiO2 using two-step controlled annealing technique for long retention nonvolatile memories

A self-assembly of high-density Al2O3 nanodots (NDs) on SiO2 has been demonstrated by employing a two-step controlled annealing method. Results show that the conglomeration of Al is impeded by oxygen and the size and density of Al2O3 NDs can be controlled by the initial Al film thickness and annealing temperature. Memory devices with Al2O3 NDs fabricated using this technique show improved retention properties compared to those with Al2O3 continuous films. A comparison of temperature dependency shows that the good retention property originates from the suppression of lateral migration of electrons via Frenkel–Poole tunneling.

Investigation of etching properties of HfO based high-K dielectrics using inductively coupled plasma

The etching properties of HfO based high dielectric constant (K) films, HfO2, HfON, HfSiO, and HfAlO, were investigated using inductively coupled plasma of Cl2/HBr/CHF3/CF4/O2. The etch rates varied depending on the chemical components in the films. Among HfO2, HfON, HfSiO, and HfAlO, the etch rates of HfSiO increased most significantly with increasing radio frequency bias power. This may be attributed to the ternary network of Hf–Si–O that is different from the binary network of other films of Hf–O, Hf–N, Si–O, and Al–O. The etch rates of HfON were higher than those of HfO2 due to the effect of the high Hf–N etch rates compared to the Hf–O etch rates, whereas the HfAlO etch rates were lower than those of HfO2 due to the effect of the low Al–O etch rates. Etch residues and chemical compositions of HfO based dielectrics were analyzed by x-ray photoelectron spectroscopy and time-of-flight secondary ion mass spectroscopy. A significant amount of fluorides existed on the surface after CF4/CHF3 etching whereas...

A direct and accurate method for the extraction of diffusion length and surface recombination velocity from an EBIC line scan

Abstract A new method is proposed for the determination of bulk minority carrier diffusion length and surface recombination velocity. This method uses data from an EBIC line scan in which the current collecting p − n junction or Schottky barrier is parallel to the electron beam. A 3-D computer simulation was used to verify the accuracy of the method. It was found that this method is simpler to use and more accurate than existing methods.