Danilo Gerna

B/W adaptive image grabber with analog motion vector estimator at 0.3 GOPS

The chip contains a B/W CMOS adaptive video-camera providing quarter common interface format (176/spl times/144 pels), two analog memories, a motion estimator (ME), and a small controller to synchronize computational phases. A modified scheme uses the two analog memories to compare consecutive frames. Good speed and power performance is obtained with only 0.5 dB loss in S/N ratio. A H261-compatible bit stream can be produced to interface with H261 decoders.

An analog memory for a QCIF format image frame storage

An analog memory suitable for storage of a photogenerated image frame is described. An architecture that allows a fast writing rate is presented. The memory has a serial input and eight channels parallel output; it can store a QCIF image (176/spl times/144 pixels) for 1/15 sec with an equivalent precision of 7 bit. Nominal input writing frequency is 2.5 MHz and output reading frequency is 0.833 MHz. The chip needs an external reference clock at 2.5 MHz. The single cell size is 22/spl times/21.2 /spl mu/m. The consumption power of the chip is 6 mW@5 Volts power supply. It has been made using a 0.7 /spl mu/m CMOS technology supplied by SGS-Thomson.