David Jauregui
Texas Instruments
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Publication
Featured researches published by David Jauregui.
international electron devices meeting | 2009
Shuming Xu; Jacek Korec; David Jauregui; Christopher Boguslaw Kocon; Simon Molly; Haian Lin; Gary Eugene Daum; Steve Perelli; Keith Barry; Charles Walter Pearce; Ozzie Lopez; Juan Alejandro Herbsommer
A new generation of Power MOSFET technology has been introduced. The devices are manufactured in a standard 0.35µm CMOS production line with only few process modules being adapted for the requirements of vertical power transistors with a 2x improvement in Figure of Merit (FOM). This improvement results mainly from the reduction in Miller capacitance.
international electron devices meeting | 2011
B Yang; Shuming Xu; Jacek Korec; Jun Wang; Ozzie Lopez; David Jauregui; Christopher Boguslaw Kocon; Juan Alejandro Herbsommer; Simon John Molloy; Gary Eugene Daum; Haian Lin; Charles Walter Pearce; Jonathan Almeria Noquil; John Shen
In this paper, an integrated NexFET power module is presented to meet requirements on next-generation, high efficiency and high current density DC-DC converters for computer applications. The new power module uses an innovative stacked-die package technology, implements low Vth power MOSFET in the low-side position, and introduces monolithically integrated components to avoid shoot-through and minimize voltage ringing at the switch node. In synchronous buck application, this power module achieves over 90% efficiency and low switch node ringing at high output current rating (25A) and high operation frequency (1MHz) under 12V input and 1.3V output condition.
applied power electronics conference | 2014
Bo Wang; Rengang Chen; David Jauregui
Common Source Inductance (CSI) is the inductance shared by the main current loop and the gate drive loop in a synchronous buck converter. Any voltage induced on CSI will change the effective gate-source voltage of the FET and has significant impacts on converter performance. This paper will explore and verify the impacts of High Side (HS) CSI on converter switch node ringing and power loss. New equations will be proposed to provide more accurate power loss estimations and help converter designs. Power MOSFET example with advanced package will be given to demonstrate converter efficiency improvement brought by minimized HS CSI. The paper will also discuss Low Side (LS) FET CSI effects on converter performance.
applied power electronics conference | 2011
Juan Alejandro Herbsommer; Jonathan Almeria Noquil; Ozzie Lopez; David Jauregui
Efficiency and power loss in the microelectronic devices is a major issue in power electronics applications. The engineers are challenged every year to increase power density and at the same time reduce the amount of power dissipated in the applications to keep the maximum temperatures under specifications. This situation drives a constant demand for better efficiencies in smaller packages. Traditional approaches to improve efficiency in DC/DC synchronous buck converters include reducing conduction losses in the MOSFETs through lower RDS(ON) devices and lowering switching losses through low-frequency operation. However the incremental improvements in RDS(ON) are at a point of diminishing returns and low RDS(ON) devices have large parasitic capacitances that do not facilitate the high-frequency operation required to improve power density. The drive for higher efficiency and increased power in smaller packages is being addressed by advancements in both silicon and packaging technologies. The NexFET Power Block combines these two technologies to achieve higher levels of performance, and in half the space versus discrete MOSFETs. This article explains these new technologies and highlights their performance advantage.
applied power electronics conference | 2013
Evan Reutzel; Rengeng Chen; Scott E. Ragona; David Jauregui
Accurate and lossless current sensing is a must for high performance multiphase buck converters used in the latest voltage regulation modules (VRMs). This paper presents a sync FET on-state resistance based approach for reconstructing a highly accurate inductor current signal that is immune to changes in operating conditions and temperature. This technique replaces DCR based sensing and can be used with any controller which requires inductor current information. The sense circuitry is built into the MOSFET driver, which in turn is co-packaged with the MOSFETs for reduced total footprint and ease of design. In addition, the accuracy that can be achieved with this technique is significantly better than the typical accuracy achieved with DCR sensing.
Archive | 2009
Jacek Korec; Christopher F. Bull; Juan Alejandro Herbsommer; David Jauregui; Christopher Boguslaw Kocon
Archive | 2011
Juan Alejandro Herbsommer; Osvaldo Jorge Lopez; Jonathan Almeria Noquil; David Jauregui
Archive | 2010
Juan Alejandro Herbsommer; Osvaldo Jorge Lopez; Jonathan Almeria Noquil; David Jauregui; Christopher Boguslaw Kocon
Archive | 2011
Scott E. Ragona; Rengang Chen; David Jauregui
Archive | 2011
Juan Alejandro Herbsommer; Osvaldo J. Loopez; Jonathan Almeria Noquil; David Jauregui; Mark E. Granahan