Jonathan Almeria Noquil

NexFET generation 2, new way to power

In this paper, an integrated NexFET power module is presented to meet requirements on next-generation, high efficiency and high current density DC-DC converters for computer applications. The new power module uses an innovative stacked-die package technology, implements low Vth power MOSFET in the low-side position, and introduces monolithically integrated components to avoid shoot-through and minimize voltage ringing at the switch node. In synchronous buck application, this power module achieves over 90% efficiency and low switch node ringing at high output current rating (25A) and high operation frequency (1MHz) under 12V input and 1.3V output condition.

Novel thermally enhanced power package

Heat generated in microelectronic devices as a result of dissipated power is a major issue in power electronics applications resulting in elevated application PC board temperatures. In order to minimize the down ward heat transfer to the application board an efficient method enabling the upward flow of heat from the silicon die to the top of the microelectronic package and subsequently transferred to the environment via forced convection needs to be employed [1]. The problem is that most of the current packaging technologies have a very poor junction-to-top thermal resistance so it is very difficult to have a substantial portion of the heat flowing to the top of the device [2]. In this paper we present a novel power package design that enables heat conduction to the top surface of the microelectronic package through the use of a high thermal conductivity path which reduces by more than a factor of ten the junction-to-top thermal resistance compared to standard solutions. The thermal resistance junction-to-top is found to be as low as 1 C/W, which is comparable with thermal resistance junction to board. This allows for a significant portion of the dissipated energy in the die to be conducted to the topside of the package where natural or forced convection can transfer the heat to the air. We discuss the design, manufacturability, performance and reliability of the package as well as thermal measurements which demonstrates the ability of the package to dissipate the heat. We also compare this solution with existing solution sin the marketplace.

Innovative 3D integration of power MOSFETs for synchronous buck converters

Efficiency and power loss in the microelectronic devices is a major issue in power electronics applications. The engineers are challenged every year to increase power density and at the same time reduce the amount of power dissipated in the applications to keep the maximum temperatures under specifications. This situation drives a constant demand for better efficiencies in smaller packages. Traditional approaches to improve efficiency in DC/DC synchronous buck converters include reducing conduction losses in the MOSFETs through lower RDS(ON) devices and lowering switching losses through low-frequency operation. However the incremental improvements in RDS(ON) are at a point of diminishing returns and low RDS(ON) devices have large parasitic capacitances that do not facilitate the high-frequency operation required to improve power density. The drive for higher efficiency and increased power in smaller packages is being addressed by advancements in both silicon and packaging technologies. The NexFET Power Block combines these two technologies to achieve higher levels of performance, and in half the space versus discrete MOSFETs. This article explains these new technologies and highlights their performance advantage.

Integration of power semiconductors devices: Synchronous buck converters in a package

Integration in power semiconductor devices has been always a challenge for technologists. This occurs mainly because the integration process increases the power density with negative consequences in the temperature of the devices which deteriorate the electrical and reliability performance in comparison with discrete approach. In order to successfully integrate power microelectronic devices one needs to have semiconductor solutions with extremely good efficiency to dissipate small quantities of heat and package solutions that can conduct extremely well the heat generated so the junction temperature of the device does not exceed the maximum temperatures under specifications. Traditional approaches to improve efficiency in DC/DC synchronous buck converters include reducing conduction losses in the MOSFETs through lower RDS(ON) devices and lowering switching losses through low-frequency operation. However the incremental improvements in RDS(ON) are at a point of diminishing returns and low RDS(ON) devices have large parasitic capacitances that do not facilitate the high-frequency operation required to improve power density. The drive for higher efficiency and excellent thermal performance to achieve high degree of integration is being addressed by advancements in both silicon and packaging technologies. In this paper we present the Power Stage concept, the technology we developed in the silicon and packaging fronts in order to integrate a half bridge DC-DC synchronous Buck converter with a gate driver IC. The NexFET Power Stage achieves higher levels of performance and integration, and in half the space versus discrete MOSFETs. This article explains these new technologies and highlights their performance advantage.

Methods to enhance the thermal performance of a 3D power package

Integration of power semiconductor devices poses many challenges, i.e. in a synchronous buck converter package where stacking multiple dies concentrates heat dissipation within a given area, the effects of which could result in elevated junction temperatures and degradation in its performance and long term reliability. To counter these challenges one needs to have a semiconductor solution with extremely good efficiency and packaging solutions that can conduct heat extremely well in multiple directions. Since TI NexFET™ addresses the silicon efficiency and performance; we focused our work on enhancing the thermal performance of a 3D power package. By implementing new design modifications in the clips and reducing the mold cap thickness, we were able to improve the overall thermal performance of stacked synchronous buck converters. There are many methods to improve the thermal performance of the 3D power package and in this paper we will present three methods evaluated for achieving that.