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Dive into the research topics where David K. Hwang is active.

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Featured researches published by David K. Hwang.


workshop on microelectronics and electron devices | 2007

Metal Gate Recessed Access Device (RAD) for DRAM Scaling

Nirmal Ramaswamy; Venkat Ananthan; David K. Hwang; Ravi Iyer; Chandra Mouli; Allen McTeer; Sanh D. Tang; Kunal R. Parekh; Tim Owens; Young Pil Kim; Nanda Palaniappan; Jian Li; Steve Groothuis; Gordon A. Haller; Shixin Wang

A functional DRAM with higher data retention characteristics than a planar access device has been demonstrated, using a metal gate recessed access device (RAD). Chemical vapor deposition (CVD) and atomic layer deposition (ALD) were used to deposit titanium nitride (TiN) and tantalum nitride (TaN), respectively. CVD TiN and ALD TaN-CVD TiN laminate gate stacks were integrated with a RAD module. ALD TaN-CVD TiN laminate gates showed enhanced drive current (IDS), higher transconductance (GM), higher mobility (¿EFF) and reduced off current (IOFF) characteristics compared to CVD TiN gates. Device characteristics and reliability data for both the planar devices and RADs are presented. The ALD TaN-CVD TiN laminate metal gate RAD showed much improved data retention characteristics compared to a conventional planar device with a poly silicon gate. The optimum thickness of ALD TaN in the laminate stack is discussed.


workshop on microelectronics and electron devices | 2006

Time-dependent dielectric breakdown of a recessed channel DRAM access device

Tim Owens; David K. Hwang; Praveen Vaidyanathan; Kunal R. Parekh

A recessed access device (RAD) used in a DRAM cell has exhibited advantages over the conventional planar access device, including retention time improvement. However, worse time-dependent dielectric breakdown (TDDB) characteristics were observed for RAD. The degraded TDDB performance is primarily attributed to thinner oxide growth in the recess


Archive | 2006

Memory cell layout and process flow

Gordon A. Haller; David K. Hwang; Sanh D. Tang; Ceredig Roberts


Archive | 2004

Critical dimension control for integrated circuits

Mirzafer Abatchev; David K. Hwang; Robert Veltrop


Archive | 2005

Method Of Manufacturing A Memory Device

Gordon A. Haller; David K. Hwang; Sanh D. Tang; Ceredig Roberts


Archive | 2010

Method of Forming a DRAM Array of Devices with Vertically Integrated Recessed Access Device and Digitline

Kunal R. Parekh; Ceredig Roberts; Thy Tran; Jim Jozwiak; David K. Hwang


Archive | 2007

Methods of fabricating dual fin structures and semiconductor device structures with dual fins

Aaron R. Wilson; Larson Lindholm; David K. Hwang


Archive | 2011

Semiconductor device having reduced sub-threshold leakage

David K. Hwang; Larson Lindholm


Archive | 2011

Methods Of Forming Vertical Field Effect Transistors, vertical field effect transistors, and dram cells

Larson Lindholm; David K. Hwang


Archive | 2013

Memory having buried digit lines and methods of making the same

Kunal R. Parekh; David K. Hwang; Wen Kuei Huang; Kuo Chen Wang; Ching Kai Lin

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