Jigish D. Trivedi

Plasma doping on 68nm CMOS device source/drain formations

The plasma doping technique offers unique advantages over conventional beam line systems, including system simplification, lower cost, higher throughput, and device performance equivalence or improvement. Plasma doping has been first used on 68 nm CMOS device source and drain formations. A PMOS device was doped by B2H5 plasma doping and an NMOS device was doped by AsH3 plasma doping. The devices fabricated by plasma doping processes were intensively evaluated in this paper. In addition to higher throughput, CMOS devices, both PMOS and NMOS devices, fabricated by plasma doping processes showed improved electrical performance to those fabricated by conventional beam line ion implantation, including ~10-20 percent lower contact resistances, similar threshold and sub-threshold characteristics, ~10 percent higher drive currents and transconductances, and better device performance curves.