David T. Price

SPACER-LESS TRANSISTOR INTEGRATION SCHEME FOR HIGH-K GATE DIELECTRICS AND SMALL GATE-TO-GATE SPACES APPLICABLE TO SI, SIGE AND STRAINED SILICON SCHEMES

Microchannel formation for fuses, interconnects, capacitors, and inductors

High performance Si-Ge device module with CMOS technology

Method and apparatus for diverting void diffusion in integrated circuit conductors

Method and apparatus for redirecting void diffusion away from vias in an integrated circuit design

Methods of memory bitmap verification for finished product

Method for forming a bonding pad on a substrate

METHOD FOR REDIRECTING VOID DIFFUSION AWAY FROM VIAS IN AN INTEGRATED CIRCUIT DESIGN

Method for sram bitmap verification

Implementation of Si-Ge HBT module with CMOS process