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Dive into the research topics where David Wei is active.

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Featured researches published by David Wei.


international interconnect technology conference | 2015

Sub-90nm pitch Cu low-k interconnect etch solution using RF pulsing technology

J H Liao; Yu Tsung Lai; Stan Wan; Brandon Kuo; Prabhakara Gopaladasu; David Wei; Sean Yao; Wesley Lin; Ivan Wang; Paul Lin; Barrett Finch; Shashank C. Deshmukh

Self-aligned via (SAV) schemes are commonly used for back-end-of-line (BEOL) interconnect structures that have scaled to <; 90nm BEOL pitch [1]. In one implementation of this scheme, a TiN metal hard mask (MHM) is used for trench pattern definition, while the interconnect vias are patterned using a tri-layer resist mask such that the vias are self-aligned to the underlayer trench lines [2]. In this work, we describe a SAV etch process using RF pulsing in a capacitively coupled etch reactor that provides a solution to both via distortion / striation and critical dimension (CD) bias loading. Electrical results will be discussed.


Electrochemical and Solid State Letters | 2003

Understanding the dishing difference between a line and a bond pad in Cu CMP

Guanghui Fu; Hugh Li; David Wei

In Cu chemical mechanical polishing (CMP), dishing for a line differs from that of a bond pad. Even if the linewidth and the side length of a square pad are the same, dishing in a line is much more severe than dishing in a pad. In this paper, we show that pad deformation may be the reason. Pad deformation over a line is primarily restricted by two sides of its surrounding areas, while pad deformation over a pad is restricted by all four sides of its surrounding areas. Therefore, it is easier for the polishing pad to touch the Cu in a line than in a bond pad, which increases dishing. The result is also verified against experimental data.


advanced semiconductor manufacturing conference | 2002

Flexible polishing surface (FPS) vs rigid polishing surface (RPS) in CMP: pros and cons

Yehiel Gotkis; David Wei; Rodney Kistler

Two major conceptual CMP approaches, namely flexible polishing surface (utilized in linear belt CMP) and rigid polishing surface (hard platen rotary and orbital CMP) concepts are compared with regard to process stability, uniformity, planarization efficiency and other performance features. A new CMP characteristic, Normalized Removal Work, the amount of wafer layer material removed by a unit of active pad area (NRW=(Thickness removed)/(Active pad area), [A/sq. inch]), is used to analyze and compare the concepts. The NRW shows how much of the removed material is transferred and redeposited over a unit of pad area. It influences all aspects of the CMP process. Low NRW is good for CMP, high NRW is bad for CMP.


Archive | 2003

Method and apparatus for heating polishing pad

Xuyen Pham; Tuan Nguyen; Ren Zhou; David Wei; Linda Jiang; Katgenhalli Y. Ramanujam; Joseph P. Simon; Tony Luong; Sridharan Srivatsan; Anjun Jerry Jin


Archive | 2001

SEMICONDUCTOR STRUCTURE IMPLEMENTING LOW-K DIELECTRIC MATERIALS AND SUPPORTING STUBS

Yehiel Gotkis; David Wei; Rodney Kistler


Archive | 2002

Semiconductor structure implementing sacrificial material and methods for making and implementing the same

Yehiel Gotkis; David Wei; Rodney Kistler


Archive | 2001

Apparatus for removal/remaining thickness profile manipulation

David Wei; Yehiel Gotkis; Aleksander Owczarz; John M. Boyd; Rod Kistler


Archive | 2001

Method and apparatus for reducing compressed dry air usage during chemical mechanical planarization

John M. Boyd; David Wei; Yehiel Gotkis


Archive | 2007

Wafer electrical discharge control using argon free dechucking gas

David Wei; Howard Dang; Masahiro Watanabe; Sean Kang; Kenji Takeshita; Mayumi Block; Stephen M. Sirard; Eric Hudson


Archive | 2002

Air platen for leading edge and trailing edge control

Anthony de la Llera; Xuyen Pham; Cangshan Xu; David Wei; Tony Luong

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