David Yeh

A 90nm CMOS 60GHz Radio

CMOS-based circuits operating at mm-wave frequencies have emerged in the past few years. This paper discusses the integration of a 60GHz CMOS single-chip transmitter and a single- chip receiver using a standard 90nm CMOS technology demonstrating a reliable solution for 60GHz single-chip radio. Proper transistor layout, complete and accurate modeling and optimized parasitic extraction method enabled the robust design of the wideband super-heterodyne architecture to support the entire 57- to-66GHz band. The analog radio front-end is controlled by a serial digital interface and has been co-designed and integrated together with a high-speed digital signal processor including analog-to-digital conversion, high speed PHY signal processing such as frequency-offset compensation, phase tracking, FIR and DFE, to support both advanced OFDM and SCBT modulation scheme. The resulting single-chip solution enables data throughputs exceeding 7Gb/s (QPSK) and 15Gb/s (16QAM) for a total DC power budget of below 200mW in TDD operation. In combination with a low-cost FR4-based packaging technology, it provides a high-performance cost-effective solution for a wide range of high volume consumer electronic applications.

60 GHz single-chip 90nm CMOS radio with integrated signal processor

A 60GHz single-chip CMOS radio has been fully integrated using standard 90nm CMOS process technology. The digitally controlled wideband super-heterodyne architecture combined with a high-speed digital signal processor has been designed to support the whole 57 to 66 GHz bandwidth available, and enable data throughput exceeding 7Gbps QPSK and 15Gbps 16QAM for a total DC power budget below 200mW. The receiver chain provides a total gain of nearly 50dB for a total noise figure below 9dB while the power amplifier delivers +8.4dBm saturated output power at 60GHz. The single-chip radio is digitally controlled via a standard SPI, and scalable to a phased array architecture. This is the highest level of integration for a 60GHz single-chip transceiver reported till date. The design has been optimized for robustness against process variation and temperature, and verified by measurement results.

60GHz single-chip CMOS digital radios and phased array solutions for gaming and connectivity

In this paper, we present four examples of highly integrated 60 GHz single-chip CMOS 90 nm digital radios and phased array solutions. These solutions include for the first time digital-to-analog/analog-to-digital conversion and embedded multi-gigabit mixed signal modem requiring no external processing. This convergence of 60 GHz CMOS digital radio, low power multi-gigabit mixed-signal processing and digital signal processing on a single chip offers the lowest energy per bit transmitted wirelessly at multi-gigabit rate to meet the very stringent low-power specifications for battery operated consumer electronic portable devices. Layout and temperature dependent 60 GHz CMOS 90 nm model development and critical high performance analog and mixed building blocks are presented as fundamental enablers for single chip integration. The designs have been optimized for robustness against process variation and temperature, and verified by measurement results.

60-GHz direct-conversion gigabit modulator/demodulator on liquid-crystal polymer

In this paper, we demonstrate the first implementation of the integrated system-on-package (SOP) 60-GHz gigabit modulator and demodulator on liquid-crystal polymer (LCP). LCP provides an organic low-cost low dielectric-constant platform suitable for millimeter-wave passive design and packaging. Firstly, we demonstrate a 60-GHz planar bandpass filter and RF/baseband duplexer as the building blocks of the integrated module. Measurement results show /spl sim/3-dB insertion loss in the bandpass filter, as well as the RF path of the duplexer, and a higher than 30-dB isolation between the baseband and RF outputs. We utilize those building blocks in the design and implemented a hybrid 60-GHz antiparallel diode-pair-based 4/spl times/ sub-harmonic mixer suitable for direct up or down conversion. Measurement results indicate a better than 17-dB insertion loss with 1.25-GHz baseband bandwidth for the 4/spl times/ mixer. Input 1-dB compression point of -2 dBm has been measured. Two subharmonic mixers are integrated back-to-back to perform the simultaneous binary phase-shift keying modulation and demodulation of the pseudorandom binary sequences. Eye diagrams show a better than 13-dB SNR for a data rate up to 1.5 Gb/s. 40-GHz versions of the 4/spl times/ subharmonic mixer and the back-to-back chain have also been implemented. Hence, we present the first integrated millimeter-wave gigabit SOP modulator and demodulator on LCP.

17-dB-gain CMOS power amplifier at 60GHz

A 60 GHz power amplifier with 17dB small signal gain is designed and measured using standard 90nm CMOS process technology. Simulation predicted accurate performances. The 3-dB bandwidth exceeding 57 to 65 GHz is achieved. This power amplifier delivers +5.1dBm output P1dB with a maximum gain of 17dB at 61 GHz for 54mW total DC consumption, achieving 5.8% PAE and a saturated output power of +8.4dBm at 60GHz. This is the highest gain CMOS power amplifier operating in the 60 GHz unlicensed band reported till date. The first temperature dependent output power characteristics of 60GHz CMOS power amplifier shows very stable operation over the entire temperature range between 0°C and +80°C.

60GHz CMOS/PCB co-design and phased array technology

In this paper, we present a highly integrated 60 GHz CMOS/PCB single-chip digital phased array solution, embedded in QFN package. This represents a unique opportunity to develop low power 60GHz multi-gigabit radio at a similar cost structure as a Bleutooth® radio, addressing the needs of a multitude of bandwidth hungry wireless multimedia applications such as high definition streaming and massive side-loading. The convergence of 60GHz CMOS digital radio, phased array technology, low power multi-gigabit mixed-signal processing low cost filter, phased array antenna embedded in standard package is discussed. In addition, uncompressed HDMI video streaming is demonstrated for the first time, using a standard battery (AAA) operated compact 60GHz CMOS/PCB QFN based module. These solutions offer the lowest energy per bit transmitted wirelessly at multi-gigabit rate, reported till date, to meet the very stringent low-power specifications for battery operated consumer electronic portable devices.

Development of CMOS Based Circuits for 60GHz WPAN applications

Recent interest in the 60 GHz band for high data rate short range wireless links has led to the significant progress in the development of integrated circuits for RF front-ends. CMOS process technology is being widely discussed for low-cost, low power mm-wave radio systems applications. In this paper we discuss various CMOS based circuits which have been developed considering carefully all the aspects such as device characterizations, the circuit topology, the circuit layouts, integration on a lost packaging for high volume fabrication lowering the cost and opening huge commercial opportunities of millimeter wave technology in the consumer electronic market place in a fairly near future.

60GHz entertainment connectivity solution

The past few years have witnessed the emergence of CMOS based circuits operating at millimeter wave-frequencies. In combination with a co-designed high volume manufacturing packaging, this represents a unique opportunity to develop low power 60GHz multi-gigabit radio at similar cost structure than a Bluetooth® radio, addressing the needs of a multitude of bandwidth hungry wireless multimedia applications such as high definition streaming and massive side-loading. In this paper, we discuss highly integrated 60 GHz single-chip CMOS digital radios and phased array solutions as the breakthrough enabling technology. Fully integrated CMOS implementations are presented, demonstrating the highest level of integration reported till date for 60GHz single-chip digital radios including embedded mixed signal baseband processor. As standardization efforts catalyzed the interest and investment of industry and agencies, 60GHz WPAN technology is poised to become in the fairly near future a ubiquitous entertainment connectivity solution for the consumer electronic market place.

An Integrated IQ Demodulator with Integrated Low-Power Multi-Gigabit BPSK / ASK Analog Signal Processor in 90nm CMOS

In this paper, two integrated low-power broadband 90 nm-CMOS analog solutions are demonstrated to demodulate the multi-gigabit BPSK/ASK signal up to 3 Gbps. In the coherent BPSK mode, a transmission speed over 2.5 Gbps is achievable with a carrier frequency range of 8.5-9.5 GHz for a total DC power consumption of 73 mW with more than 20 dB conversion gain. A minimum sensitivity of -35 dBm is demonstrated for this demodulator with 33 dB dynamic range. In the non-coherent ASK mode, a transmission speed over 3 Gbps is achieved for a carrier frequency range of 6-9 GHz at DC power consumption of 32 mW. A minimum sensitivity of -26 dBm is demonstrated for the demodulator with 21 dB dynamic range. This is the best trade-off in terms of data rate and power consumption of CMOS demodulators reported at around 10 GHz carrier frequencies.

FR-4 and CMOS: Enabling Technologies for Consumer Volume Millimeterwave Applications

The past few years has witnessed the emergence of CMOS based circuits operating at millimeter wave frequencies. Integrated on a low cost organic packaging, this is the promise for high volume fabrication, lowering the cost and opening huge commercial markets. As standardization efforts catalyzed the interest and investment of industry and agencies, one can be assured of ubiquitous millimeter-wave technology in the consumer electronic market place in the fairly near future.