Dean Lewis

Laser beam thermography of circuits in the particular case of passivated semiconductors

Abstract Surface temperature changes upon integrated circuits can be observed by measuring the corresponding reflectance variation. We presented this method for temperature measurement in earlier work [1, 2] for Si integrated circuits with no passivation layer. We show in this presentation how the passivation oxide layer upon integrated circuits increases, with a factor depending upon the oxide thickness, the reflectance response resulting from a temperature change. Absolute temperature changes are derived from reflectance measurements through a temperature coefficient. This coefficient, known for silicon, is calculated for different oxide thickness.s. We have built a laser probe for reflectance measurements upon integrated circuits. The probe, which includes a visualisation set-up, has a lateral resolution of 1 μm, the size of the laser spot. Absolute temperature changes from 0.05 to 500 K can be determined and followed as a function of time as the detection system covers the DC-125 MHz range. The laser probe allows also the precise measurement of the oxide thickness upon the semiconductor component. This is performed through the measurement of the reflectance at two different angles of incidence.

Backside laser testing of ICs for SET sensitivity evaluation

A new experimental approach combining backside laser testing and analog mapping is presented. A new technique for integrated circuits (ICs) backside preparation by laser ablation is evaluated. The methodology is applied to the study of single-event transient (SET) sensitivity on a linear IC.

Time-resolved scanning of integrated circuits with a pulsed laser: application to transient fault injection in an ADC

This paper presents an experimental system for integrated circuits testing with a pulsed laser beam. The system is fully automated and simultaneously provides interesting spatial and temporal resolutions for various applications like fault injection, radiation sensitivity evaluation, or default localization. In the presented application, the system is used to visualize signal propagation in an 8 bit half-flash ADC.

Investigation of single-event transients in voltage-controlled oscillators

The responses of voltage-controlled oscillators (VCOs) to single-event transients (SETs) are investigated. Laser testing and simulations indicate that ion strikes on critical transistors cause distortions in the oscillating output. The time it takes for the circuit to resume its normal operating condition is limited by the recovery time of the affected transistor(s) and the oscillator startup time. These limits to circuit recovery time are the primary causes of the frequency dependence of SET responses in VCOs.

Influence of Laser Pulse Duration in Single Event Upset Testing

Device simulations of laser induced SEU in an SRAM cell are performed with pulse durations from 100 fs to 100 mus. SEU threshold energy is notably dependent on the pulse duration. Two regimes are identified and modeled analytically and electrically

Validation of radiation hardened designs by pulsed laser testing and SPICE analysis

Abstract A new pulsed laser system dedicated to the simulation of radiation effects on integrated circuits is presented. On-line testing capabilities are detailed and two SPICE models of radiation induced transient currents are proposed to be used for results analysis.

Delay variation mapping induced by dynamic laser stimulation

We present a novel technique based on dynamic laser stimulation (DLS) to characterize CMOS structures and to highlight time margin alterations by delay variation mapping. We used photoelectric laser stimulation (PLS) or thermal laser stimulation (TLS) to perturb CMOS transistor characteristics in order to affect propagation delays. The proposed methodology further extends the capabilities of DLS techniques such as soft defect localization (SDL) and laser assisted device alteration (LADA) to characterize defective ICs.

Laser cross section measurement for the evaluation of single-event effects in integrated circuits

Abstract The cross section of ICs extracted from particles accelerator testing is extended to the pulsed laser testing. The extraction methodology attached to this new parameter is presented. It provides a new tool for integrated circuits reliability quantification, illustrated in the case of SEU sensitivity evaluation of a single SRAM cell.

3D knife-edge characterization of two-photon absorption volume in silicon for integrated circuit testing

We have performed three-dimensional characterization of the TPA effective laser spot size in silicon using an integrated knife-edge sensor. The TPA-induced response of a CMOS integrated circuit is analyzed based on these results and compared to simulation; we have found that the charge injection capacity in ICs active layer could be influenced by irradiance energy and focus depth.

SPICE modeling of the transient response of irradiated MOSFETs

A new SPICE model of irradiated MOSFET taking into account the real response of the four electrodes is proposed. A comparison between SPICE-generated transient response and PISCES device simulation demonstrates the accuracy benefits when used in complex electronic architectures.