Deepanshu Dutta

Extra dummy erase pulses after shallow erase-verify to avoid sensing deep erased threshold voltage

Data recovery for non-volatile memory based on count of data state-specific fails

SELECTED WORD LINE DEPENDENT SELECT GATE VOLTAGE DURING PROGRAM

Pair bit line programming to improve boost voltage clamping

Controlling Select Gate Voltage During Erase To Improve Endurance In Non-Volatile Memory

Programming Memory With Reduced Pass Voltage Disturb And Floating Gate-To-Control Gate Leakage

Data state-dependent channel boosting to reduce channel-to-floating gate coupling in memory

Multi-Pass Programming For Memory Using Word Line Coupling

On chip dynamic read for non-volatile storage

Programming non-volatile memory with bit line voltage step up