Dieter Gräf

New Wet Cleaning Strategies for Obtaining Highly Reliable thin Oxides

The effect of metal contamination and silicon surface defects on the gate oxide yield is investigated. The characteristics of various cleaning procedures are studied and correlated with the integrity of thin gate oxides. The standard wet cleaning recipe is optimized and a new cleaning strategy is proposed. Selective contamination experiments in chemicals and on Siwafers are used to investigate the effect of small amounts of metal contaminants on the gate oxide integrity. It is found that the characteristics of the silicon substrate play a dominant role in this. HF-last processes are investigated and a new wet cleaning strategy is proposed.

Impact of Chemomechanical Polishing on the Chemical Composition and Morphology of the Silicon Surface

The polishing technology used for manufacturing ultraflat and smooth Si surfaces on a large scale is the chemomechanical polishing (CMP) technique. This technique combines the chemical corrosive removal of silicon atoms and the mechanical transport of the agents. The removal rates strongly depend on the interaction of mechanical parameters and the chemistry involved in the polishing process like the pH of the alkaline polishing slurry used. Removal of Si during CMP is explained by a nucleophilic attack of OH − to silicon atoms catalyzing the corrosive reaction of H 2 O resulting in cleavage of silicon backbonds. Characterization of the surface chemistry of the silicon wafer after polishing by X-Ray Photoelectron Spectroscopy and High-Resolution Electron Energy Loss Spectroscopy reveals an oxide free, predominantly hydride covered silicon surface displaying hydrophobic properties. Morphological features like microroughness as well as localized surface irregularities on the silicon surface, also referred to as Light Point Defects, depend on different strongly interacting process parameters. Microroughness is reduced by CMP by several orders of magnitude as characterized by lightscattering techniques and Atomic Force Microscopy.

The effect of metallic impurities on the dielectric breakdown of oxides and some new ways of avoiding them

The effect of metallic contamination on the dielectric breakdown of thermal oxide layers is investigated. Wafers were intentionally contaminated with Ca, Zn, Fe, Cu or Al. The oxidation behavior of the contaminants and their effect on the Si surface roughness were investigated and correlated with the oxide breakdown properties. It was observed that Ca interacts strongly with the Si substrate during ramp-up. This results in a large increase in the Si surface roughness and poor breakdown properties of the thermal oxide layer. Fe degrades the oxide integrity by the formation of defect spots during the oxidation and Al induces damage under the SiO/sub 2//poly-Si interface. Metals such as Cu and Zn diffuse easily in the Si substrate and, consequently, do not have a large impact on the oxide quality. Standard grade chemicals are the main source for the metallic impurities. After switching to ultrapure chemicals, the DI-water distribution system becomes the limiting factor. Some techniques to reduce the contamination and Si-surface roughening are presented.<<ETX>>

Observation of Extremely Low Defect Densities in Silicon Wafers

Defects in p- polished silicon wafers originating from Czochralski (Cz)-pulled crystals are commonly delineated by hot SC1 treatment with immersion times in the range from about 20 min to 4 h corresponding to silicon removals of 20 nm to 200 nm. This procedure is no longer applicable for wafers with defect densities that are orders of magnitude lower than in Cz p- wafers due to their very low count rates. However, a low defect density, such as in homoepitaxial silicon layers, can be investigated by sequentially treating wafers in hot SC1 solution several times so that the overall duration of the preparation is on the order of twenty hours resulting in a silicon removal of about 1 µm. Defects delineated by hot SC1 etching can, in addition, be investigated with an atomic force microscope. In the case of homoepitaxial silicon layers, these defects are identified as single as well as dual pits with a morphology characteristic of so-called crystal originated particles (COPs) as observed on p- Cz wafers. These COPs are related to voids generated by vacancy agglomeration in the growing ingot. The morphology of the delineated defects indicates that such voids exist in homoepitaxial layers as well, which is supported by the fact that the temperature range relevant for void formation in p- Cz silicon crystals is also used in silicon homoepitaxial growth. The oxygen backpressure during homoepitaxial silicon growth is negligible. Thus, formation of voids in the epitaxial layer is not influenced by oxygen, specifically when an oxygen-free silicon substrate, such as a wafer cut from a floating-zone (FZ) crystal, is used. However, not only single but also dual-pit COPs are observed on such epitaxial layers after delineation, which questions assumptions and models in the literature attributing the formation of multiple voids in p- Cz silicon crystals to the role of oxygen.

Surfaces and Crystal Defects of Silicon

Bulk crystal defects are accessible for investigation when silicon crystals are sliced and the defects occur close to or at the surface of wafers. Such near-surface defects can then be delineated by modifying some processes used for preparing clean, polished wafers. The delineated defects usually occur as pits the shape of which depends on the delineation process used. The different shapes of the pits has consequences for their detection by light scattering techniques (laser scanners or surface inspection systems). The density of the such generated surface defects is related to the defect density in the crystal bulk and is influenced by the growth parameters. These surface defects therefore provide a means for studying and for characterizing the bulk defect density.

Silicon Surface Treatments and their Impact on Chemical Composition and Morphology

The smoothness of silicon wafer surfaces is defined by polishing. Subsequent cleaning steps take account of surface conditioning of the wafer and meet the demands for low metal surface contamination as well as low particle level. Wet chemical treatments, however, can also influence surface morphology. The coexistence of oxidation and etching of the Si surface has a pronounced feedback on the resulting surface roughness. This holds in particular for SC1 cleaning solutions and modified HF treatments. Buffered HF enhances surface roughness of the technological important Si (100) surface, in contrast to a smoothening effect on Si (111). The same holds for other modifications of HF treatments with an enhanced oxidation behaviour involved, like HF-H 2 O 2 solutions. In parallel with the change of surface morphology and with the increase of surface roughness an increase in Light Point Defect (LPD) densities is also found. Small LPDs are predominantly not particle related, depend on the respective silicon substrate material and were not found to influence gate oxide integrity.