Dimitrios Fitsios

Memory Speed Analysis of Optical RAM and Optical Flip-Flop Circuits Based on Coupled SOA-MZI Gates

We demonstrate analytical frequency-domain transfer function expressions for an optical random access memory (RAM) cell that employs two SOA-based ON/OFF switches and two coupled SOA-MZI gates forming an optical flip-flop. Our theoretical model relies on first-order perturbation theory approximations applied for the first time to coupled optical switching structures, resulting to an optical RAM cell frequency response that allows for a qualitative and quantitative analysis of optical RAM memory speed and performance characteristics and their dependence on certain RAM cell device parameters. We show that the transfer function of an optical RAM cell and its incorporated flip-flop device exhibits periodic resonance frequencies resembling the behavior of optical ring resonator configurations. Its free spectral range is mainly dictated by the length of the waveguide that enables the coupling of the two SOA-MZI gates, yielding this coupling length as the dominant memory speed determining factor. The obtained results are in close agreement with experimental observations, demonstrating that optimized RAM cell designs with waveguide coupling lengths lower than 5 mm can enable RAM operation at memory speeds well beyond 40 GHz.

Bringing WDM Into Optical Static RAM Architectures

Optical RAM appears to be the alternative approach towards overcoming the “Memory Wall” of electronics, suggesting use of light in RAM architectures to enable ps-regime memory access times. In this communication we take advantage of the wavelength properties of optical signals to present new architectural perspectives in optical RAM structures by introducing the WDM principles in the storage area. To this end, we report on a 4 × 4 WDM optical RAM bank architecture that exploits a novel SOA-based multi-wavelength Access Gate (WDM-AG) and a dual wavelength SOA-based SET-RESET All-Optical Flip Flop (AOFF) as fundamental building blocks. The WDM-AG enables simultaneous random access to a 4-bit optical word encoded in 8 different wavelengths, allowing for the four AOFFs of each RAM row to effectively share the same Access Gate. The scheme is shown to support a 10 Gbit/s operation for the incoming 4-bit data streams, with a power consumption of 15 mW/Gbit/s for the WDM-AG and 120 mW/Gbit/s for the AOFFs. The proposed optical RAM architecture reveals that exploiting the WDM capabilities of optical components can lead to RAM bank implementations with smarter column/row encoders/decoders, increased circuit simplicity, reduced number of active elements and associated power consumption, while enabling for re-configurability in optical cache mapping.

Optical RAM and Flip-Flops Using Bit-Input Wavelength Diversity and SOA-XGM Switches

In this paper, we demonstrate a novel RAM cell based only on three traveling waveguide semiconductor optical amplifier-cross gain modulation (SOA-XGM) switches. The RAM cell features wavelength diversity in the incoming bit signals and provides Read/Write operation capability with true random access exclusively in the optical domain. Two of the SOA-XGM switches are coupled together through an 70/30 coupler to form an asynchronous flip-flop, which serves as the memory unit. Random access to the memory unit is granted by a third SOA-ON/OFF switch and all three SOAs together form the proposed RAM cell. Proof-of-principle operation is experimentally demonstrated at 8 Mb/s using commercial fiber-pigtailed components. The distinctive simplicity of the proposed RAM cell architecture suggests reduced footprint. The proposed flip-flop layout holds all the credentials for reaching multi-Gb/s operational speeds, if photonic integration technologies are employed to obtain wavelength-scale waveguides and ultrashort coupling lengths. This is numerically confirmed for 10 Gb/s using a simulation model based on the transfer matrix method and a wideband steady-state material gain coefficient.

Dual SOA-MZI Wavelength Converters Based on III-V Hybrid Integration on a

We report on the simultaneous wavelength conversion operation of a dual-element semiconductor optical amplifier-Mach-Zehnder interferometer (SOA-MZI) array hybridly integrated on a 4-μm silicon-on-insulator (SOI) waveguide platform through thermocompression bonding. The SOAs are part of a six-element SOA array with both facets coupled on SOI through vertical and horizontal alignments. The device achieves almost two orders of magnitude reduction in footprint compared with state-of-the-art hybridly integrated SOA-MZI structures. We present for the first time experimental proof of the successful operation of a dual-element SOA-MZI device based on III-V technology on SoI that serves as a wavelength converter, with one SOA-MZI yielding error-free performance with a 0.8-dB power penalty at 12.5 Gb/s and the second SOA-MZI operating error-free at 10 Gb/s with a 2-dB power penalty.

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We demonstrate a frequency and time domain analysis for optical random access memory (RAM) cells that rely on semiconductor optical amplifier (SOA)-based switches but employ different switching mechanisms. The first RAM cell utilizes SOA cross gain modulation (XGM) switches both for the access gate as well as latching mechanism, whereas the second RAM cell configuration utilizes SOA-Mach-Zehnder interferometer cross phase modulation (XPM) switches. The frequency domain analysis exploits first-order perturbation theory approximations towards deriving the RAM cell frequency response, which is shown to exhibit in both RAM cell layouts a comb like resonant behavior. The free spectral range is dictated by the coupling length between the coupled switches that form the latching element, whereas the finesse depends on the temporal response of the switching mechanism employed. The qualitative speed and signal quality results obtained in the frequency domain are confirmed by a respective time-domain analysis carried out for both RAM cell layouts, using an experimentally validated time-domain SOA simulation model that relies on the transfer matrix method. Performance analysis in the time domain reveals in addition important quantitative RAM output signal measures like the extinction ratio and its dependence on the coupling length and the operational speed, as well as the input power dynamic range for successful RAM operation. Our holistic frequency- and time-domain analysis framework provides an in-depth understanding of performance-critical design parameters and their relationship to expected RAM cell performance characteristics. This is then utilized for a one-by-one system level comparison between the two RAM cell layouts in terms of readout extinction ratio, maximum speed, footprint, and power consumption concluding that the SOA-XGM-based RAM cell offers certain advantages when operational speeds not higher than 10 Gb/s are targeted, and the SOA-XPM-based RAM cell setup dominating when higher RAM serial speeds even up to 40 GHz are targeted.

-Scale Si Platform

The authors demonstrate a novel all-optical T-flip-flop (TFF) layout utilizing a single optical latching element that comprises an integrated semiconductor optical amplifier and Mach-Zehnder inteferometer and a feedback loop. Experimental proof-of-concept verification is presented at 8 Mb/s using off-the-shelf bulk components and a fiber-based feedback implementation. The proposed TFF architecture requires the minimum number of active components and just a single toggling signal as input. Its simple circuit design is amenable with photonic integration and holds the credentials for operation at multi-Gb/s speeds.

XPM- and XGM-Based Optical RAM Memories: Frequency and Time Domain Theoretical Analysis

We demonstrate a novel all-optical static RAM cell that exploits wavelength diversity in the incoming optical streams towards reducing the number of active elements. The circuit requires only three semiconductor optical amplifiers-cross gain modulation gates for successful read/write operation, yielding a 25% reduction in power consumption compared to state-of-the-art configurations. Proof-of-concept experimental verification is presented at 8 Mb/s using fiber-interconnected off-the-shelf bulk components.

All-Optical T-Flip-Flop Using a Single SOA-MZI-Based Latching Element

We present analytical expressions for the frequency-domain transfer function of an optical flip-flop (O-FF) cell that employs an semiconductor optical amplifier-Mach-Zehnder interferometer gate and a feedback loop. Our analysis relies on first-order perturbation theory approximations applied for the first time to optical switching structures employing feedback-loop, resulting to an O-FF frequency response that allows for a qualitative and quantitative analysis of memory speed and performance characteristics and their dependence on certain device parameters. We show that the transfer function of the O-FF exhibits periodic resonance frequencies resembling the behavior of optical linear cavity configurations and its free spectral range is mainly dictated by the length of the waveguide that forms the feedback loop, revealing this loop length as the main memory speed determining factor. Experimental verification is provided, achieving good agreement with theoretical observations. The presented design guidelines show the way for achieving memory speeds beyond 30 GHz if employing feedback loop lengths lower than 5 mm, while we provide a direct comparison between O-FFs employing feedback loops or coupled switches, giving insight for future optical memories.

Dual-Wavelength Bit Input Optical RAM With Three SOA-XGM Switches

We demonstrate a novel optical SR-flip flop with simple architecture, employing only two SOA XGM switches. Proof-of-principle operation is experimentally demonstrated at 8 Mb/s and numerically evaluated at 10 Gb/s.

Memory Speed Analysis of an Optical Flip-Flop Employing a SOA-MZI and a Feedback Loop

Heterogeneous integration of III-V semiconductors on silicon has gained considerable momentum fueled by the need to implement fully functional photonic devices and circuits in a CMOS compatible platform. In this communication, we report on a III-V photonic crystal (PhC) nanocavity, heterogeneously integrated on a silicon-on-insulator platform, to form a PhC nanocavity laser capable of exhibiting two elementary static random access memory (SRAM) cell functions individually, namely switching and latching operations under a high-speed, bit-level regime. As such, the PhC nanocavity laser is examined as a generic logic functions building block, suitable toward multiGb/s energy-efficient, optical SRAM cells with minimal device footprint. The proposed device occupies a total area of only 6.2 μm2 , rendering in this way the demonstrated memory element the smallest among the integrated optical memories presented so far. Bit-level SRAM cell operation requires two elementary functions: the access gate (AG) switching function and set-reset flip-flop (SR-FF) latching function. At first, AG switching operation is evaluated through successful wavelength conversion at 10 Gb/s, revealing a power penalty of 1 dB at 10-9 BER and a switching energy of only 4.8 fJ/bit. Then, fully functional SR-FF memory operation is successfully demonstrated, exhibiting error-free operation with negative power penalty at 5 Gb/s and switching energies of 6.4 fJ/bit. FF operation at higher speeds of 10 Gb/s with reduced switching energy levels of 3.2 fJ/bit is also experimentally investigated. Both logic operations were demonstrated separately with the same PhC nanocavity laser device exhibiting <;50 ps switching times and evaluated under real-type data traffic patterns, raising expectations for beyond 20 Gb/s capabilities toward implementing energy-efficient, ultracompact and high-speed true optical SRAM setups for Datacom applications.